[PATCH] D15132: [X86][SSE] Update the cost table for integer-integer conversions on SSE2.

Cong Hou via llvm-commits llvm-commits at lists.llvm.org
Wed Dec 9 17:19:04 PST 2015


congh added inline comments.

================
Comment at: lib/Target/X86/X86TargetTransformInfo.cpp:703
@@ +702,3 @@
+    { ISD::ZERO_EXTEND, MVT::v4i16,  MVT::v4i8,   1 },
+    { ISD::SIGN_EXTEND, MVT::v4i16,  MVT::v4i8,   6 },
+
----------------
RKSimon wrote:
> congh wrote:
> > RKSimon wrote:
> > > These values don't appear to be correct for SSE41 which has PMOVSX/PMOVZX ops - maybe split off the 128-bit extension ops from AVXConversionTbl into SSE41ConversionTbl ?
> > SSSE3 also provides pshufb from which several operations here can benefit. So you suggestion adding more tables for SSSE3/SSE4.1?
> You may not need SSSE3 (often PSHUFB is as costly as fixed shuffles on older hardware - it just reduces register use) but splitting the extensions from AVX into SSE41 needs to be done.
I agree. SSE41 really provides several instructions that can greatly reduce those costs. I have added a table for SSE41 and also updated the test case. PTAL.

================
Comment at: lib/Target/X86/X86TargetTransformInfo.cpp:724
@@ -694,3 +723,3 @@
   }
 
   if (ST->hasAVX512()) {
----------------
RKSimon wrote:
> I haven't checked this very thoroughly but you might need to improve non-simple type handling here, especially for extensions?
This patch is actually adding cost entries for non-simple types. I added another query on the table below for non-simple types except this one. Those entries of float/int conversions also need to be updated for non-simple types and I will do it later. To prevent vector-size/types combination explosion, I think we probably need to redesign the cost table.


http://reviews.llvm.org/D15132





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