[llvm] r255182 - PeepholeOptimizer: Ignore dead implicit defs

[Dan Gohman via llvm-commits]

Author: djg
Date: Wed Dec  9 18:37:51 2015
New Revision: 255182

URL: http://llvm.org/viewvc/llvm-project?rev=255182&view=rev
Log:
PeepholeOptimizer: Ignore dead implicit defs

Target-specific instructions may have uninteresting physreg clobbers,
for target-specific reasons. The peephole pass doesn't need to concern
itself with such defs, as long as they're implicit and marked as dead.

Modified:
    llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp
    llvm/trunk/test/CodeGen/WebAssembly/conv.ll

Modified: llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp?rev=255182&r1=255181&r2=255182&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp (original)
+++ llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp Wed Dec  9 18:37:51 2015
@@ -1343,6 +1343,9 @@ bool PeepholeOptimizer::foldImmediate(Ma
     MachineOperand &MO = MI->getOperand(i);
     if (!MO.isReg() || MO.isDef())
       continue;
+    // Ignore dead implicit defs.
+    if (MO.isImplicit() && MO.isDead())
+      continue;
     unsigned Reg = MO.getReg();
     if (!TargetRegisterInfo::isVirtualRegister(Reg))
       continue;
@@ -1703,6 +1706,9 @@ ValueTrackerResult ValueTracker::getNext
     const MachineOperand &MO = Def->getOperand(OpIdx);
     if (!MO.isReg() || !MO.getReg())
       continue;
+    // Ignore dead implicit defs.
+    if (MO.isImplicit() && MO.isDead())
+      continue;
     assert(!MO.isDef() && "We should have skipped all the definitions by now");
     if (SrcIdx != EndOpIdx)
       // Multiple sources?

Modified: llvm/trunk/test/CodeGen/WebAssembly/conv.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/conv.ll?rev=255182&r1=255181&r2=255182&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/conv.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/conv.ll Wed Dec  9 18:37:51 2015
@@ -225,3 +225,31 @@ define i64 @anyext(i32 %x) {
     %w = shl i64 %y, 32
     ret i64 %w
 }
+
+; CHECK-LABEL: bitcast_i32_to_float:
+; CHECK: f32.reinterpret/i32   $push0=, $0{{$}}
+define float @bitcast_i32_to_float(i32 %a) {
+  %t = bitcast i32 %a to float
+  ret float %t
+}
+
+; CHECK-LABEL: bitcast_float_to_i32:
+; CHECK: i32.reinterpret/f32   $push0=, $0{{$}}
+define i32 @bitcast_float_to_i32(float %a) {
+  %t = bitcast float %a to i32
+  ret i32 %t
+}
+
+; CHECK-LABEL: bitcast_i64_to_double:
+; CHECK: f64.reinterpret/i64   $push0=, $0{{$}}
+define double @bitcast_i64_to_double(i64 %a) {
+  %t = bitcast i64 %a to double
+  ret double %t
+}
+
+; CHECK-LABEL: bitcast_double_to_i64:
+; CHECK: i64.reinterpret/f64   $push0=, $0{{$}}
+define i64 @bitcast_double_to_i64(double %a) {
+  %t = bitcast double %a to i64
+  ret i64 %t
+}