[PATCH] D15256: ARM: Better codegen for 64-bit compares.

[Hans Wennborg via llvm-commits]

hans added a comment.

Looks reasonable to me, but I don't know enough about ARM to be a good reviewer here.


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Comment at: lib/Target/ARM/ARMISelLowering.cpp:4720
@@ +4719,3 @@
+  SDValue Chain = DAG.getCopyToReg(DAG.getEntryNode(), DL, ARM::CPSR,
+                                   Cmp.getValue(1), SDValue());
+  return DAG.getNode(ARMISD::CMOV, DL, Op.getValueType(), FVal, TVal, ARMcc,
----------------
I'm too unfamiliar with ARM to follow this.

Should I understand it that Cmp.getValue(1) is something suitable to be moved into the flags register, and that makes it possible to do the CMOV below? (Which the BRCOND combine below will eliminate if we really want to branch on this rather than get a value?)


http://reviews.llvm.org/D15256