[PATCH] D14069: [FPEnv Core 04/14] Skip constant folding to preserve FPEnv

Sergey Dmitrouk via llvm-commits llvm-commits at lists.llvm.org
Mon Dec 7 13:07:30 PST 2015 

sdmitrouk updated this revision to Diff 42097.
sdmitrouk added a comment.

Revert questionable change in `undef-label.ll` (it shouldn't be here anyway), this also removes four tests that are now in http://reviews.llvm.org/D14067.


Repository:
  rL LLVM

http://reviews.llvm.org/D14069

Files:
  include/llvm/Analysis/ValueTracking.h
  include/llvm/IR/Constants.h
  include/llvm/IR/FastMathFlags.h
  include/llvm/IR/Operator.h
  lib/Analysis/InstructionSimplify.cpp
  lib/Analysis/ValueTracking.cpp
  lib/IR/ConstantFold.cpp
  lib/IR/ConstantFold.h
  lib/IR/Constants.cpp
  lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
  lib/Transforms/InstCombine/InstructionCombining.cpp
  lib/Transforms/Scalar/Scalarizer.cpp
  test/CodeGen/AArch64/arm64-ccmp.ll
  test/CodeGen/AArch64/arm64-dagcombiner-load-slicing.ll
  test/CodeGen/AArch64/arm64-fmadd.ll
  test/CodeGen/AArch64/arm64-misched-basic-A53.ll
  test/CodeGen/AArch64/arm64-neon-2velem-high.ll
  test/CodeGen/AArch64/arm64-neon-2velem.ll
  test/CodeGen/AArch64/arm64-neon-scalar-by-elem-mul.ll
  test/CodeGen/AArch64/arm64-vmul.ll
  test/CodeGen/AArch64/fcvt-fixed.ll
  test/CodeGen/AArch64/fcvt_combine.ll
  test/CodeGen/AArch64/fdiv-combine.ll
  test/CodeGen/AArch64/fdiv_combine.ll
  test/CodeGen/AArch64/floatdp_2source.ll
  test/CodeGen/AArch64/fp-dp3.ll
  test/CodeGen/AArch64/neon-diagnostics.ll
  test/CodeGen/AArch64/neon-fma.ll
  test/CodeGen/AArch64/vcvt-oversize.ll
  test/CodeGen/AMDGPU/big_alu.ll
  test/CodeGen/AMDGPU/bitcast.ll
  test/CodeGen/AMDGPU/commute_modifiers.ll
  test/CodeGen/AMDGPU/cvt_flr_i32_f32.ll
  test/CodeGen/AMDGPU/cvt_rpi_i32_f32.ll
  test/CodeGen/AMDGPU/ds-negative-offset-addressing-mode-loop.ll
  test/CodeGen/AMDGPU/ds_read2.ll
  test/CodeGen/AMDGPU/ds_read2_offset_order.ll
  test/CodeGen/AMDGPU/ds_read2_superreg.ll
  test/CodeGen/AMDGPU/ds_read2st64.ll
  test/CodeGen/AMDGPU/fabs.f64.ll
  test/CodeGen/AMDGPU/fabs.ll
  test/CodeGen/AMDGPU/fadd.ll
  test/CodeGen/AMDGPU/fadd64.ll
  test/CodeGen/AMDGPU/fconst64.ll
  test/CodeGen/AMDGPU/fdiv.f64.ll
  test/CodeGen/AMDGPU/fdiv.ll
  test/CodeGen/AMDGPU/fetch-limits.r600.ll
  test/CodeGen/AMDGPU/fetch-limits.r700+.ll
  test/CodeGen/AMDGPU/ffloor.f64.ll
  test/CodeGen/AMDGPU/fma-combine.ll
  test/CodeGen/AMDGPU/fmad.ll
  test/CodeGen/AMDGPU/fmul.ll
  test/CodeGen/AMDGPU/fmul64.ll
  test/CodeGen/AMDGPU/fmuladd.ll
  test/CodeGen/AMDGPU/fneg-fabs.f64.ll
  test/CodeGen/AMDGPU/fneg-fabs.ll
  test/CodeGen/AMDGPU/fneg.f64.ll
  test/CodeGen/AMDGPU/fneg.ll
  test/CodeGen/AMDGPU/frem.ll
  test/CodeGen/AMDGPU/fsub.ll
  test/CodeGen/AMDGPU/fsub64.ll
  test/CodeGen/AMDGPU/half.ll
  test/CodeGen/AMDGPU/imm.ll
  test/CodeGen/AMDGPU/jump-address.ll
  test/CodeGen/AMDGPU/literals.ll
  test/CodeGen/AMDGPU/llvm.AMDGPU.cube.ll
  test/CodeGen/AMDGPU/llvm.AMDGPU.fract.f64.ll
  test/CodeGen/AMDGPU/llvm.AMDGPU.fract.ll
  test/CodeGen/AMDGPU/llvm.AMDGPU.rcp.f64.ll
  test/CodeGen/AMDGPU/llvm.AMDGPU.rcp.ll
  test/CodeGen/AMDGPU/llvm.SI.sample.ll
  test/CodeGen/AMDGPU/llvm.SI.sampled.ll
  test/CodeGen/AMDGPU/llvm.sin.ll
  test/CodeGen/AMDGPU/load-input-fold.ll
  test/CodeGen/AMDGPU/mad-combine.ll
  test/CodeGen/AMDGPU/mad-sub.ll
  test/CodeGen/AMDGPU/madak.ll
  test/CodeGen/AMDGPU/madmk.ll
  test/CodeGen/AMDGPU/max-literals.ll
  test/CodeGen/AMDGPU/merge-stores.ll
  test/CodeGen/AMDGPU/operand-spacing.ll
  test/CodeGen/AMDGPU/pv-packing.ll
  test/CodeGen/AMDGPU/pv.ll
  test/CodeGen/AMDGPU/r600-encoding.ll
  test/CodeGen/AMDGPU/r600-export-fix.ll
  test/CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
  test/CodeGen/AMDGPU/reciprocal.ll
  test/CodeGen/AMDGPU/rsq.ll
  test/CodeGen/AMDGPU/rv7x0_count3.ll
  test/CodeGen/AMDGPU/schedule-fs-loop-nested-if.ll
  test/CodeGen/AMDGPU/schedule-if-2.ll
  test/CodeGen/AMDGPU/schedule-if.ll
  test/CodeGen/AMDGPU/schedule-vs-if-nested-loop.ll
  test/CodeGen/AMDGPU/sgpr-copy.ll
  test/CodeGen/AMDGPU/shared-op-cycle.ll
  test/CodeGen/AMDGPU/shl_add_ptr.ll
  test/CodeGen/AMDGPU/si-sgpr-spill.ll
  test/CodeGen/AMDGPU/si-spill-cf.ll
  test/CodeGen/AMDGPU/subreg-coalescer-crash.ll
  test/CodeGen/AMDGPU/swizzle-export.ll
  test/CodeGen/AMDGPU/tex-clause-antidep.ll
  test/CodeGen/AMDGPU/texture-input-merge.ll
  test/CodeGen/AMDGPU/use-sgpr-multiple-times.ll
  test/CodeGen/AMDGPU/v_mac.ll
  test/CodeGen/AMDGPU/vop-shrink.ll
  test/CodeGen/ARM/2009-11-07-SubRegAsmPrinting.ll
  test/CodeGen/ARM/a15-mla.ll
  test/CodeGen/ARM/crash-greedy.ll
  test/CodeGen/ARM/darwin-eabi.ll
  test/CodeGen/ARM/debug-info-branch-folding.ll
  test/CodeGen/ARM/debug-info-d16-reg.ll
  test/CodeGen/ARM/debug-info-qreg.ll
  test/CodeGen/ARM/fmacs.ll
  test/CodeGen/ARM/fmscs.ll
  test/CodeGen/ARM/fnegs.ll
  test/CodeGen/ARM/fnmacs.ll
  test/CodeGen/ARM/fnmscs.ll
  test/CodeGen/ARM/fnmul.ll
  test/CodeGen/ARM/fnmuls.ll
  test/CodeGen/ARM/fp-fast.ll
  test/CodeGen/ARM/fusedMAC.ll
  test/CodeGen/ARM/ifcvt10.ll
  test/CodeGen/ARM/isel-v8i32-crash.ll
  test/CodeGen/ARM/reg_sequence.ll
  test/CodeGen/ARM/saxpy10-a9.ll
  test/CodeGen/ARM/unsafe-fsub.ll
  test/CodeGen/ARM/vcvt.ll
  test/CodeGen/ARM/vcvt_combine.ll
  test/CodeGen/ARM/vdiv_combine.ll
  test/CodeGen/ARM/vfp.ll
  test/CodeGen/ARM/vmla.ll
  test/CodeGen/ARM/vmls.ll
  test/CodeGen/ARM/vmul.ll
  test/CodeGen/Hexagon/opt-fneg.ll
  test/CodeGen/Mips/fmadd1.ll
  test/CodeGen/Mips/msa/3rf.ll
  test/CodeGen/Mips/msa/arithmetic_float.ll
  test/CodeGen/Mips/msa/basic_operations_float.ll
  test/CodeGen/NVPTX/div-ri.ll
  test/CodeGen/NVPTX/fast-math.ll
  test/CodeGen/NVPTX/fma-assoc.ll
  test/CodeGen/NVPTX/fma-disable.ll
  test/CodeGen/NVPTX/fma.ll
  test/CodeGen/NVPTX/fp-contract.ll
  test/CodeGen/NVPTX/implicit-def.ll
  test/CodeGen/NVPTX/rsqrt.ll
  test/CodeGen/PowerPC/a2-fp-basic.ll
  test/CodeGen/PowerPC/fdiv-combine.ll
  test/CodeGen/PowerPC/fma-assoc.ll
  test/CodeGen/PowerPC/fma-ext.ll
  test/CodeGen/PowerPC/fma.ll
  test/CodeGen/PowerPC/fneg.ll
  test/CodeGen/PowerPC/loop-prep-all.ll
  test/CodeGen/PowerPC/machine-combiner.ll
  test/CodeGen/PowerPC/pip-inner.ll
  test/CodeGen/PowerPC/ppc440-fp-basic.ll
  test/CodeGen/PowerPC/pr15632.ll
  test/CodeGen/PowerPC/qpx-bv-sint.ll
  test/CodeGen/PowerPC/qpx-split-vsetcc.ll
  test/CodeGen/PowerPC/recipest.ll
  test/CodeGen/PowerPC/s000-alias-misched.ll
  test/CodeGen/PowerPC/unsafe-math.ll
  test/CodeGen/SystemZ/fp-add-01.ll
  test/CodeGen/SystemZ/fp-add-02.ll
  test/CodeGen/SystemZ/fp-add-03.ll
  test/CodeGen/SystemZ/fp-cmp-04.ll
  test/CodeGen/SystemZ/fp-div-01.ll
  test/CodeGen/SystemZ/fp-div-02.ll
  test/CodeGen/SystemZ/fp-div-03.ll
  test/CodeGen/SystemZ/fp-mul-01.ll
  test/CodeGen/SystemZ/fp-mul-02.ll
  test/CodeGen/SystemZ/fp-mul-03.ll
  test/CodeGen/SystemZ/fp-mul-04.ll
  test/CodeGen/SystemZ/fp-mul-05.ll
  test/CodeGen/SystemZ/fp-sincos-01.ll
  test/CodeGen/SystemZ/fp-sub-01.ll
  test/CodeGen/SystemZ/fp-sub-02.ll
  test/CodeGen/SystemZ/fp-sub-03.ll
  test/CodeGen/Thumb2/2010-06-14-NEONCoalescer.ll
  test/CodeGen/Thumb2/buildvector-crash.ll
  test/CodeGen/Thumb2/float-ops.ll
  test/CodeGen/Thumb2/ifcvt-neon.ll
  test/CodeGen/X86/2008-10-27-CoalescerBug.ll
  test/CodeGen/X86/2012-04-26-sdglue.ll
  test/CodeGen/X86/atomic_mi.ll
  test/CodeGen/X86/avx512-fma.ll
  test/CodeGen/X86/avx512vl-arith.ll
  test/CodeGen/X86/chain_order.ll
  test/CodeGen/X86/constant-pool-remat-0.ll
  test/CodeGen/X86/fadd-combines.ll
  test/CodeGen/X86/fdiv-combine.ll
  test/CodeGen/X86/fdiv.ll
  test/CodeGen/X86/fma-do-not-commute.ll
  test/CodeGen/X86/fma_patterns.ll
  test/CodeGen/X86/fma_patterns_wide.ll
  test/CodeGen/X86/fmul-combines.ll
  test/CodeGen/X86/fmul-zero.ll
  test/CodeGen/X86/fold-load-binops.ll
  test/CodeGen/X86/fold-xmm-zero.ll
  test/CodeGen/X86/fp-fast.ll
  test/CodeGen/X86/fp_constant_op.ll
  test/CodeGen/X86/haddsub-2.ll
  test/CodeGen/X86/haddsub-undef.ll
  test/CodeGen/X86/haddsub.ll
  test/CodeGen/X86/load-slice.ll
  test/CodeGen/X86/lsr-static-addr.ll
  test/CodeGen/X86/machine-combiner.ll
  test/CodeGen/X86/misched-copy.ll
  test/CodeGen/X86/misched-ilp.ll
  test/CodeGen/X86/misched-matmul.ll
  test/CodeGen/X86/negative-sin.ll
  test/CodeGen/X86/pr23103.ll
  test/CodeGen/X86/pr24139.ll
  test/CodeGen/X86/select.ll
  test/CodeGen/X86/sincos-opt.ll
  test/CodeGen/X86/sink-hoist.ll
  test/CodeGen/X86/sse-fcopysign.ll
  test/CodeGen/X86/sse1.ll
  test/CodeGen/X86/sse3-avx-addsub-2.ll
  test/CodeGen/X86/sse3-avx-addsub.ll
  test/CodeGen/X86/sse41.ll
  test/CodeGen/X86/stack-folding-fp-avx1.ll
  test/CodeGen/X86/stack-folding-fp-sse42.ll
  test/CodeGen/X86/vec_ss_load_fold.ll
  test/CodeGen/X86/vec_unsafe-fp-math.ll
  test/Transforms/CodeGenPrepare/X86/select.ll
  test/Transforms/InstCombine/2009-01-19-fmod-constant-float-specials.ll
  test/Transforms/InstCombine/fold-fops-into-selects.ll
  test/Transforms/LoopReroll/basic.ll
  test/Transforms/LoopReroll/nonconst_lb.ll
  test/Transforms/Reassociate/mixed-fast-nonfast-fp.ll
  test/Transforms/SCCP/apint-load.ll
  test/Transforms/SLPVectorizer/X86/insert-element-build-vector.ll

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