[llvm] r254881 - [WebAssembly] Tighten up some testcase regular expressions.
Dan Gohman via llvm-commits
llvm-commits at lists.llvm.org
Sun Dec 6 11:31:44 PST 2015
Author: djg
Date: Sun Dec 6 13:31:44 2015
New Revision: 254881
URL: http://llvm.org/viewvc/llvm-project?rev=254881&view=rev
Log:
[WebAssembly] Tighten up some testcase regular expressions.
Modified:
llvm/trunk/test/CodeGen/WebAssembly/cfg-stackify.ll
llvm/trunk/test/CodeGen/WebAssembly/cpus.ll
llvm/trunk/test/CodeGen/WebAssembly/switch.ll
Modified: llvm/trunk/test/CodeGen/WebAssembly/cfg-stackify.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/cfg-stackify.ll?rev=254881&r1=254880&r2=254881&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/cfg-stackify.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/cfg-stackify.ll Sun Dec 6 13:31:44 2015
@@ -90,14 +90,14 @@ back:
; CHECK-LABEL: test2:
; CHECK: block BB2_2{{$}}
-; CHECK: br_if {{.*}}, BB2_2{{$}}
+; CHECK: br_if {{[^,]*}}, BB2_2{{$}}
; CHECK: BB2_1:
; CHECK: br_if ${{[0-9]+}}, BB2_1{{$}}
; CHECK: BB2_2:
; CHECK: return{{$}}
; OPT-LABEL: test2:
; OPT: block BB2_2{{$}}
-; OPT: br_if {{.*}}, BB2_2{{$}}
+; OPT: br_if {{[^,]*}}, BB2_2{{$}}
; OPT: BB2_1:
; OPT: br_if ${{[0-9]+}}, BB2_1{{$}}
; OPT: BB2_2:
@@ -140,9 +140,9 @@ for.end:
; OPT-LABEL: doublediamond:
; OPT: block BB3_5{{$}}
; OPT: block BB3_4{{$}}
-; OPT: br_if {{.*}}, BB3_4{{$}}
+; OPT: br_if {{[^,]*}}, BB3_4{{$}}
; OPT: block BB3_3{{$}}
-; OPT: br_if {{.*}}, BB3_3{{$}}
+; OPT: br_if {{[^,]*}}, BB3_3{{$}}
; OPT: br BB3_5{{$}}
; OPT: BB3_4:
; OPT: BB3_5:
@@ -204,7 +204,7 @@ exit:
; OPT-LABEL: diamond:
; OPT: block BB5_3{{$}}
; OPT: block BB5_2{{$}}
-; OPT: br_if {{.*}}, BB5_2{{$}}
+; OPT: br_if {{[^,]*}}, BB5_2{{$}}
; OPT: br BB5_3{{$}}
; OPT: BB5_2:
; OPT: BB5_3:
@@ -269,7 +269,7 @@ loop:
; OPT-NOT: br
; OPT: BB8_1:
; OPT: loop BB8_2{{$}}
-; OPT: br_if {{.*}}, BB8_1{{$}}
+; OPT: br_if {{[^,]*}}, BB8_1{{$}}
; OPT: BB8_2:
; OPT: return ${{[0-9]+}}{{$}}
define i32 @simple_loop(i32* %p, i32 %a) {
@@ -333,7 +333,7 @@ exit:
; OPT-LABEL: ifelse_earlyexits:
; OPT: block BB10_4{{$}}
; OPT: block BB10_3{{$}}
-; OPT: br_if {{.*}}, BB10_3{{$}}
+; OPT: br_if {{[^,]*}}, BB10_3{{$}}
; OPT: br_if $1, BB10_4{{$}}
; OPT: br BB10_4{{$}}
; OPT: BB10_3:
@@ -379,9 +379,9 @@ exit:
; OPT: loop BB11_7{{$}}
; OPT: block BB11_6{{$}}
; OPT: block BB11_5{{$}}
-; OPT: br_if {{.*}}, BB11_5{{$}}
+; OPT: br_if {{[^,]*}}, BB11_5{{$}}
; OPT: block BB11_4{{$}}
-; OPT: br_if {{.*}}, BB11_4{{$}}
+; OPT: br_if {{[^,]*}}, BB11_4{{$}}
; OPT: br BB11_6{{$}}
; OPT: BB11_4:
; OPT: br BB11_6{{$}}
Modified: llvm/trunk/test/CodeGen/WebAssembly/cpus.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/cpus.ll?rev=254881&r1=254880&r2=254881&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/cpus.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/cpus.ll Sun Dec 6 13:31:44 2015
@@ -9,8 +9,8 @@
; RUN: llc < %s -mtriple=wasm32-unknown-unknown -mcpu=invalidcpu 2>&1 | FileCheck %s --check-prefix=INVALID
; RUN: llc < %s -mtriple=wasm64-unknown-unknown -mcpu=invalidcpu 2>&1 | FileCheck %s --check-prefix=INVALID
-; CHECK-NOT: {{.*}} is not a recognized processor for this target
-; INVALID: {{.*}} is not a recognized processor for this target
+; CHECK-NOT: {{.*}} is not a recognized processor for this target
+; INVALID: {{.*}} is not a recognized processor for this target
define i32 @f(i32 %i_like_the_web) {
ret i32 %i_like_the_web
Modified: llvm/trunk/test/CodeGen/WebAssembly/switch.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/switch.ll?rev=254881&r1=254880&r2=254881&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/switch.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/switch.ll Sun Dec 6 13:31:44 2015
@@ -21,7 +21,7 @@ declare void @foo5()
; CHECK: block BB0_4{{$}}
; CHECK: block BB0_3{{$}}
; CHECK: block BB0_2{{$}}
-; CHECK: tableswitch {{.*}}, BB0_2, BB0_2, BB0_2, BB0_2, BB0_2, BB0_2, BB0_2, BB0_2, BB0_3, BB0_3, BB0_3, BB0_3, BB0_3, BB0_3, BB0_3, BB0_3, BB0_4, BB0_4, BB0_4, BB0_4, BB0_4, BB0_4, BB0_5, BB0_6, BB0_7{{$}}
+; CHECK: tableswitch {{[^,]*}}, BB0_2, BB0_2, BB0_2, BB0_2, BB0_2, BB0_2, BB0_2, BB0_2, BB0_3, BB0_3, BB0_3, BB0_3, BB0_3, BB0_3, BB0_3, BB0_3, BB0_4, BB0_4, BB0_4, BB0_4, BB0_4, BB0_4, BB0_5, BB0_6, BB0_7{{$}}
; CHECK: BB0_2:
; CHECK: call foo0
; CHECK: BB0_3:
@@ -101,7 +101,7 @@ sw.epilog:
; CHECK: block BB1_4{{$}}
; CHECK: block BB1_3{{$}}
; CHECK: block BB1_2{{$}}
-; CHECK: tableswitch {{.*}}, BB1_2, BB1_2, BB1_2, BB1_2, BB1_2, BB1_2, BB1_2, BB1_2, BB1_3, BB1_3, BB1_3, BB1_3, BB1_3, BB1_3, BB1_3, BB1_3, BB1_4, BB1_4, BB1_4, BB1_4, BB1_4, BB1_4, BB1_5, BB1_6, BB1_7{{$}}
+; CHECK: tableswitch {{[^,]*}}, BB1_2, BB1_2, BB1_2, BB1_2, BB1_2, BB1_2, BB1_2, BB1_2, BB1_3, BB1_3, BB1_3, BB1_3, BB1_3, BB1_3, BB1_3, BB1_3, BB1_4, BB1_4, BB1_4, BB1_4, BB1_4, BB1_4, BB1_5, BB1_6, BB1_7{{$}}
; CHECK: BB1_2:
; CHECK: call foo0
; CHECK: BB1_3:
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