[llvm] r254438 - AMDGPU: Report extractelement as free in cost model
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 1 11:08:40 PST 2015
Author: arsenm
Date: Tue Dec 1 13:08:39 2015
New Revision: 254438
URL: http://llvm.org/viewvc/llvm-project?rev=254438&view=rev
Log:
AMDGPU: Report extractelement as free in cost model
The cost for scalarized operations is computed as N * (scalar operation
cost + 1 extractelement + 1 insertelement). This partially fixes
inflating the cost of scalarized operations since every operation is
scalarized and free. I don't think we want any cost asociated with
scalarization, but for now insertelement is still counted. I'm not sure
if we should pretend that insertelement is also free, or add a way
to compute a custom scalarization cost.
Added:
llvm/trunk/test/Analysis/CostModel/AMDGPU/
llvm/trunk/test/Analysis/CostModel/AMDGPU/extractelement.ll
llvm/trunk/test/Analysis/CostModel/AMDGPU/lit.local.cfg
Modified:
llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp?rev=254438&r1=254437&r2=254438&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp Tue Dec 1 13:08:39 2015
@@ -80,3 +80,14 @@ unsigned AMDGPUTTIImpl::getMaxInterleave
// Semi-arbitrary large amount.
return 64;
}
+
+int AMDGPUTTIImpl::getVectorInstrCost(unsigned Opcode, Type *ValTy,
+ unsigned Index) {
+ switch (Opcode) {
+ case Instruction::ExtractElement:
+ // Dynamic indexing isn't free and is best avoided.
+ return Index == ~0u ? 2 : 0;
+ default:
+ return BaseT::getVectorInstrCost(Opcode, ValTy, Index);
+ }
+}
Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h?rev=254438&r1=254437&r2=254438&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h Tue Dec 1 13:08:39 2015
@@ -60,6 +60,8 @@ public:
unsigned getNumberOfRegisters(bool Vector);
unsigned getRegisterBitWidth(bool Vector);
unsigned getMaxInterleaveFactor(unsigned VF);
+
+ int getVectorInstrCost(unsigned Opcode, Type *ValTy, unsigned Index);
};
} // end namespace llvm
Added: llvm/trunk/test/Analysis/CostModel/AMDGPU/extractelement.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/CostModel/AMDGPU/extractelement.ll?rev=254438&view=auto
==============================================================================
--- llvm/trunk/test/Analysis/CostModel/AMDGPU/extractelement.ll (added)
+++ llvm/trunk/test/Analysis/CostModel/AMDGPU/extractelement.ll Tue Dec 1 13:08:39 2015
@@ -0,0 +1,110 @@
+; RUN: opt -cost-model -analyze -mtriple=amdgcn-unknown-amdhsa < %s | FileCheck %s
+
+; CHECK: 'extractelement_v2i32'
+; CHECK: estimated cost of 0 for {{.*}} extractelement <2 x i32>
+define void @extractelement_v2i32(i32 addrspace(1)* %out, <2 x i32> addrspace(1)* %vaddr) {
+ %vec = load <2 x i32>, <2 x i32> addrspace(1)* %vaddr
+ %elt = extractelement <2 x i32> %vec, i32 1
+ store i32 %elt, i32 addrspace(1)* %out
+ ret void
+}
+
+; CHECK: 'extractelement_v2f32'
+; CHECK: estimated cost of 0 for {{.*}} extractelement <2 x float>
+define void @extractelement_v2f32(float addrspace(1)* %out, <2 x float> addrspace(1)* %vaddr) {
+ %vec = load <2 x float>, <2 x float> addrspace(1)* %vaddr
+ %elt = extractelement <2 x float> %vec, i32 1
+ store float %elt, float addrspace(1)* %out
+ ret void
+}
+
+; CHECK: 'extractelement_v3i32'
+; CHECK: estimated cost of 0 for {{.*}} extractelement <3 x i32>
+define void @extractelement_v3i32(i32 addrspace(1)* %out, <3 x i32> addrspace(1)* %vaddr) {
+ %vec = load <3 x i32>, <3 x i32> addrspace(1)* %vaddr
+ %elt = extractelement <3 x i32> %vec, i32 1
+ store i32 %elt, i32 addrspace(1)* %out
+ ret void
+}
+
+; CHECK: 'extractelement_v4i32'
+; CHECK: estimated cost of 0 for {{.*}} extractelement <4 x i32>
+define void @extractelement_v4i32(i32 addrspace(1)* %out, <4 x i32> addrspace(1)* %vaddr) {
+ %vec = load <4 x i32>, <4 x i32> addrspace(1)* %vaddr
+ %elt = extractelement <4 x i32> %vec, i32 1
+ store i32 %elt, i32 addrspace(1)* %out
+ ret void
+}
+
+; CHECK: 'extractelement_v8i32'
+; CHECK: estimated cost of 0 for {{.*}} extractelement <8 x i32>
+define void @extractelement_v8i32(i32 addrspace(1)* %out, <8 x i32> addrspace(1)* %vaddr) {
+ %vec = load <8 x i32>, <8 x i32> addrspace(1)* %vaddr
+ %elt = extractelement <8 x i32> %vec, i32 1
+ store i32 %elt, i32 addrspace(1)* %out
+ ret void
+}
+
+; FIXME: Should be non-0
+; CHECK: 'extractelement_v8i32_dynindex'
+; CHECK: estimated cost of 2 for {{.*}} extractelement <8 x i32>
+define void @extractelement_v8i32_dynindex(i32 addrspace(1)* %out, <8 x i32> addrspace(1)* %vaddr, i32 %idx) {
+ %vec = load <8 x i32>, <8 x i32> addrspace(1)* %vaddr
+ %elt = extractelement <8 x i32> %vec, i32 %idx
+ store i32 %elt, i32 addrspace(1)* %out
+ ret void
+}
+
+; CHECK: 'extractelement_v2i64'
+; CHECK: estimated cost of 0 for {{.*}} extractelement <2 x i64>
+define void @extractelement_v2i64(i64 addrspace(1)* %out, <2 x i64> addrspace(1)* %vaddr) {
+ %vec = load <2 x i64>, <2 x i64> addrspace(1)* %vaddr
+ %elt = extractelement <2 x i64> %vec, i64 1
+ store i64 %elt, i64 addrspace(1)* %out
+ ret void
+}
+
+; CHECK: 'extractelement_v3i64'
+; CHECK: estimated cost of 0 for {{.*}} extractelement <3 x i64>
+define void @extractelement_v3i64(i64 addrspace(1)* %out, <3 x i64> addrspace(1)* %vaddr) {
+ %vec = load <3 x i64>, <3 x i64> addrspace(1)* %vaddr
+ %elt = extractelement <3 x i64> %vec, i64 1
+ store i64 %elt, i64 addrspace(1)* %out
+ ret void
+}
+
+; CHECK: 'extractelement_v4i64'
+; CHECK: estimated cost of 0 for {{.*}} extractelement <4 x i64>
+define void @extractelement_v4i64(i64 addrspace(1)* %out, <4 x i64> addrspace(1)* %vaddr) {
+ %vec = load <4 x i64>, <4 x i64> addrspace(1)* %vaddr
+ %elt = extractelement <4 x i64> %vec, i64 1
+ store i64 %elt, i64 addrspace(1)* %out
+ ret void
+}
+
+; CHECK: 'extractelement_v8i64'
+; CHECK: estimated cost of 0 for {{.*}} extractelement <8 x i64>
+define void @extractelement_v8i64(i64 addrspace(1)* %out, <8 x i64> addrspace(1)* %vaddr) {
+ %vec = load <8 x i64>, <8 x i64> addrspace(1)* %vaddr
+ %elt = extractelement <8 x i64> %vec, i64 1
+ store i64 %elt, i64 addrspace(1)* %out
+ ret void
+}
+
+; CHECK: 'extractelement_v4i8'
+; CHECK: estimated cost of 0 for {{.*}} extractelement <4 x i8>
+define void @extractelement_v4i8(i8 addrspace(1)* %out, <4 x i8> addrspace(1)* %vaddr) {
+ %vec = load <4 x i8>, <4 x i8> addrspace(1)* %vaddr
+ %elt = extractelement <4 x i8> %vec, i8 1
+ store i8 %elt, i8 addrspace(1)* %out
+ ret void
+}
+
+; CHECK: 'extractelement_v2i16'
+; CHECK: estimated cost of 0 for {{.*}} extractelement <2 x i16>
+define void @extractelement_v2i16(i16 addrspace(1)* %out, <2 x i16> addrspace(1)* %vaddr) {
+ %vec = load <2 x i16>, <2 x i16> addrspace(1)* %vaddr
+ %elt = extractelement <2 x i16> %vec, i16 1
+ store i16 %elt, i16 addrspace(1)* %out
+ ret void
+}
Added: llvm/trunk/test/Analysis/CostModel/AMDGPU/lit.local.cfg
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/CostModel/AMDGPU/lit.local.cfg?rev=254438&view=auto
==============================================================================
--- llvm/trunk/test/Analysis/CostModel/AMDGPU/lit.local.cfg (added)
+++ llvm/trunk/test/Analysis/CostModel/AMDGPU/lit.local.cfg Tue Dec 1 13:08:39 2015
@@ -0,0 +1,2 @@
+if not 'AMDGPU' in config.root.targets:
+ config.unsupported = True
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