[PATCH] D15122: AArch64FastISel: Use cbz/cbnz to branch on i1

[Matthias Braun via llvm-commits]

MatzeB added a comment.

In http://reviews.llvm.org/D15122#299704, @t.p.northover wrote:

> I don't think this is quite right. The i1 content of a register is only the low bit, isn't it? This is most easily seen outside Darwin (we're the only ones that extend incoming paramters in the caller), but I think this gets miscompiled even for us:
>
>   define i32 @foo(i32 %in) {
>   entry:
>     %val = trunc i32 %in to i1
>     br label %do_test
>  
>   do_test:
>     %tst = phi i1 [%val, %entry]
>     br i1 %tst, label %true, label %false
>  
>   true:
>  
>     ret i32 0
>  
>   false:
>     ret i32 1
>   }
>   
>
> So I think we really do need the TBZ for correctness.


I tried your example and even the non-fast-isel produce by "llc -march arm64 -O0" seems to use plain cbz, is this a bug?

I was looking at TargetLowering::getBooleanContents() comments: "For targets without i1 registers, this gives the nature of the high-bits of boolean values held in types wider than i1." for aarch64 this is "ZeroOrOneBooleanContent".
Is it wrong to rely on this in this context? I admit this warrants an assert(getBooleanContents() != UndefinedBooleanContents) to express my reasoning.


Repository:
  rL LLVM

http://reviews.llvm.org/D15122