[PATCH] D15117: Define a feature for __float128 support in the PPC back end

[Nemanja Ivanovic via llvm-commits]

nemanjai created this revision.
nemanjai added reviewers: hfinkel, kbarton, wschmidt.
nemanjai added a subscriber: llvm-commits.
nemanjai set the repository for this revision to rL LLVM.

In preparation for supporting IEEE Quad precision floating point, this patch simply defines a feature to specify the target supports this. For now, nothing is done with the target feature, we just don't want warnings from the Clang FE when a user specifies -mfloat128.

Repository:
  rL LLVM

http://reviews.llvm.org/D15117

Files:
  lib/Target/PowerPC/PPC.td
  lib/Target/PowerPC/PPCSubtarget.cpp
  lib/Target/PowerPC/PPCSubtarget.h

Index: lib/Target/PowerPC/PPCSubtarget.h
===================================================================
--- lib/Target/PowerPC/PPCSubtarget.h
+++ lib/Target/PowerPC/PPCSubtarget.h
@@ -120,6 +120,7 @@
   bool HasDirectMove;
   bool HasHTM;
   bool HasFusion;
+  bool HasFloat128;
 
   /// When targeting QPX running a stock PPC64 Linux kernel where the stack
   /// alignment has not been changed, we need to keep the 16-byte alignment
@@ -256,6 +257,7 @@
   }
   bool hasHTM() const { return HasHTM; }
   bool hasFusion() const { return HasFusion; }
+  bool hasFloat128() const { return HasFloat128; }
 
   const Triple &getTargetTriple() const { return TargetTriple; }
 
Index: lib/Target/PowerPC/PPCSubtarget.cpp
===================================================================
--- lib/Target/PowerPC/PPCSubtarget.cpp
+++ lib/Target/PowerPC/PPCSubtarget.cpp
@@ -101,6 +101,7 @@
   IsQPXStackUnaligned = false;
   HasHTM = false;
   HasFusion = false;
+  HasFloat128 = false;
 }
 
 void PPCSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
Index: lib/Target/PowerPC/PPC.td
===================================================================
--- lib/Target/PowerPC/PPC.td
+++ lib/Target/PowerPC/PPC.td
@@ -139,6 +139,10 @@
                                         "Implement mftb using the mfspr instruction">;
 def FeatureFusion : SubtargetFeature<"fusion", "HasFusion", "true",
                                      "Target supports add/load integer fusion.">;
+def FeatureFloat128 :
+  SubtargetFeature<"float128", "HasFloat128", "true",
+                   "Enable the __float128 data type for IEEE-754R Binary128.",
+                   [FeatureVSX]>;
 
 def DeprecatedDST    : SubtargetFeature<"", "DeprecatedDST", "true",
   "Treat vector data stream cache control instructions as deprecated">;


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D15117.41520.patch
Type: text/x-patch
Size: 1823 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20151201/7ed15e49/attachment.bin>