[PATCH] D14969: MachineScheduler: Allow independent scheduling of sub register defs

Matthias Braun via llvm-commits llvm-commits at lists.llvm.org
Mon Nov 30 13:15:52 PST 2015


MatzeB added a comment.

In http://reviews.llvm.org/D14969#298725, @atrick wrote:

> How does this avoid creating multiple disjoint live subranges for a single virtual register? Will verifyLiveInterval choke on this?
>
> RegisterPressureTracker now mutates the machine instructions which is conceptually wrong. If there is no other efficient way to handle setting the read-undef flags, then this needs to be very clearly documented in the tracker API and where the scheduler forces it to be used for subregisters.


Yes the current code feels very wrong in this respect. To properly fix this I have to go into RegisterPressure and expose the RegisterOperands class publicly so the RegisterOperands can be built in the MachineScheduler and then be passed on to RegisterPressure and used to set the flags.
As that is a bigger refactoring I tried to avoid it in the context of this patch, but I can understand that you do not want these layering violations in the code, I'll look into the refactoring and propose separate patches for that.


================
Comment at: lib/CodeGen/MachineScheduler.cpp:335-337
@@ +334,5 @@
+  if (mf.getRegInfo().subRegLivenessEnabled()) {
+    // Dead subregister defs have no users and therefore no dependencies,
+    // moving them around may cause liveintervals to degrade into multiple
+    // component. Change the dead subregister defs to have their own vreg.
+    LIS->renameDeadSubRegDefs();
----------------
atrick wrote:
> How are multiple disjoint live segments avoided in general for non-dead sub register definitions? What if the sub register definitions initially overlap and scheduling makes them disjoint? It looks like we place a read-undef flag on subsequent definitions creating multiple "connected components" in the live range.
You are right, this cannot only happen for dead-subreg defs but may also happen for degenerated cases where we have completely independent def+use pairs for subregisters. I think except for completely dead subregister defs this won't happen in typical programs since the whole point of using subregisters is to have some defs or uses where they are joined.

But we certainly need MachineVerifier checking for this property. I'll work on that.


Repository:
  rL LLVM

http://reviews.llvm.org/D14969





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