[PATCH] D15076: AVX512: support AVX512BW Intrinsic in 32bit mode.

[Elena Demikhovsky via llvm-commits]

delena added inline comments.

================
Comment at: lib/Target/X86/X86ISelLowering.cpp:16009
@@ +16008,3 @@
+  } else if (Mask.getSimpleValueType() == MVT::i64 && MaskVT == MVT::v64i1 &&
+             Subtarget->hasBWI() && Subtarget->is32Bit()) {
+    // In case 32bit mode, bitcast i64 is illegal, expend it.
----------------
You can put assert:
if (Mask.getSimpleValueType() == MVT::i64 && Subtarget->is32Bit()) {
 assert(MaskVT == MVT::v64i1 &&
 assert(Subtarget->hasBWI() & ..

but it is not necessary



================
Comment at: lib/Target/X86/X86ISelLowering.cpp:16010
@@ +16009,3 @@
+             Subtarget->hasBWI() && Subtarget->is32Bit()) {
+    // In case 32bit mode, bitcast i64 is illegal, expend it.
+    SDValue partL, partH;
----------------
extend / split

================
Comment at: lib/Target/X86/X86ISelLowering.cpp:16012
@@ +16011,3 @@
+    SDValue partL, partH;
+    partL = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Mask,
+                        DAG.getConstant(0, dl, MVT::i32));
----------------
Lo, Hi

================
Comment at: lib/Target/X86/X86ISelLowering.cpp:16033
@@ -15994,1 +16032,3 @@
+
+
 /// \brief Return (and \p Op, \p Mask) for compare instructions or
----------------
remove empty line


Repository:
  rL LLVM

http://reviews.llvm.org/D15076