[PATCH] D14909: [X86][FMA] Optimize FNEG(FMUL) Patterns
Steve Canon via llvm-commits
llvm-commits at lists.llvm.org
Sat Nov 28 14:52:26 PST 2015
scanon added inline comments.
================
Comment at: lib/Target/X86/X86ISelLowering.cpp:26157
@@ -26141,3 +26156,3 @@
// instruction to include the extra negation.
if (Arg.hasOneUse()) {
switch (Arg.getOpcode()) {
----------------
0 - a*b gets the sign of zero wrong if a or b is exactly zero; the result should be -0, but +0 is returned instead in default rounding. So this should be protected by no signed zeros.
Repository:
rL LLVM
http://reviews.llvm.org/D14909
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