[PATCH] D15014: [AArch64] Add ARMv8.2-A FP16 scalar instructions

[Ahmed Bougacha via llvm-commits]

ab added a subscriber: ab.
ab accepted this revision.
ab added a reviewer: ab.
ab added a comment.
This revision is now accepted and ready to land.

LGTM

I'll submit a patch for fccmp if you don't have one already. Thanks!


================
Comment at: lib/Target/AArch64/AArch64InstrFormats.td:4195
@@ -4057,1 +4194,3 @@
                             SDPatternOperator OpNode = null_frag> {
+  let Defs = [NZCV], Uses = [NZCV] in {
+  def Hrr : BaseFPCondComparison<signalAllNans, FPR16, mnemonic, []> {
----------------
Redundant with 4175?


Repository:
  rL LLVM

http://reviews.llvm.org/D15014