[llvm] r254156 - [AArch64] Add ARMv8.2-A persistent memory instruction

[Oliver Stannard via llvm-commits]

Author: olista01
Date: Thu Nov 26 09:28:47 2015
New Revision: 254156

URL: http://llvm.org/viewvc/llvm-project?rev=254156&view=rev
Log:
[AArch64] Add ARMv8.2-A persistent memory instruction

ARMv8.2-A adds the "dc cvap" instruction, which is a system instruction
that cleans caches to the point of persistence (for systems that have
persistent memory). It is a required part of ARMv8.2-A, so no additional
subtarget features are required.

Differential Revision: http://reviews.llvm.org/D15016


Added:
    llvm/trunk/test/MC/AArch64/armv8.2a-persistent-memory.s
    llvm/trunk/test/MC/Disassembler/AArch64/armv8.2a-persistent-memory.txt
Modified:
    llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
    llvm/trunk/lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp
    llvm/trunk/lib/Target/AArch64/InstPrinter/AArch64InstPrinter.h

Modified: llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp?rev=254156&r1=254155&r2=254156&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp Thu Nov 26 09:28:47 2015
@@ -2465,6 +2465,13 @@ bool AArch64AsmParser::parseSysAlias(Str
     } else if (!Op.compare_lower("cisw")) {
       // SYS #0, C7, C14, #2
       SYS_ALIAS(0, 7, 14, 2);
+    } else if (!Op.compare_lower("cvap")) {
+      if (getSTI().getFeatureBits()[AArch64::HasV8_2aOps]) {
+        // SYS #3, C7, C12, #1
+        SYS_ALIAS(3, 7, 12, 1);
+      } else {
+        return TokError("DC CVAP requires ARMv8.2a");
+      }
     } else {
       return TokError("invalid operand for DC instruction");
     }

Modified: llvm/trunk/lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp?rev=254156&r1=254155&r2=254156&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp Thu Nov 26 09:28:47 2015
@@ -55,7 +55,7 @@ void AArch64InstPrinter::printInst(const
   unsigned Opcode = MI->getOpcode();
 
   if (Opcode == AArch64::SYSxt)
-    if (printSysAlias(MI, O)) {
+    if (printSysAlias(MI, STI, O)) {
       printAnnotation(O, Annot);
       return;
     }
@@ -674,7 +674,9 @@ void AArch64AppleInstPrinter::printInst(
   AArch64InstPrinter::printInst(MI, O, Annot, STI);
 }
 
-bool AArch64InstPrinter::printSysAlias(const MCInst *MI, raw_ostream &O) {
+bool AArch64InstPrinter::printSysAlias(const MCInst *MI,
+                                       const MCSubtargetInfo &STI,
+                                       raw_ostream &O) {
 #ifndef NDEBUG
   unsigned Opcode = MI->getOpcode();
   assert(Opcode == AArch64::SYSxt && "Invalid opcode for SYS alias!");
@@ -729,6 +731,11 @@ bool AArch64InstPrinter::printSysAlias(c
       if (Op1Val == 3 && Op2Val == 1)
         Asm = "dc\tcvau";
       break;
+    case 12:
+      if (Op1Val == 3 && Op2Val == 1 &&
+          (STI.getFeatureBits()[AArch64::HasV8_2aOps]))
+        Asm = "dc\tcvap";
+      break;
     case 14:
       if (Op1Val == 3 && Op2Val == 1)
         Asm = "dc\tcivac";

Modified: llvm/trunk/lib/Target/AArch64/InstPrinter/AArch64InstPrinter.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/InstPrinter/AArch64InstPrinter.h?rev=254156&r1=254155&r2=254156&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/InstPrinter/AArch64InstPrinter.h (original)
+++ llvm/trunk/lib/Target/AArch64/InstPrinter/AArch64InstPrinter.h Thu Nov 26 09:28:47 2015
@@ -48,7 +48,8 @@ public:
                                      unsigned AltIdx = AArch64::NoRegAltName);
 
 protected:
-  bool printSysAlias(const MCInst *MI, raw_ostream &O);
+  bool printSysAlias(const MCInst *MI, const MCSubtargetInfo &STI,
+                     raw_ostream &O);
   // Operand printers
   void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
                     raw_ostream &O);

Added: llvm/trunk/test/MC/AArch64/armv8.2a-persistent-memory.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/armv8.2a-persistent-memory.s?rev=254156&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/armv8.2a-persistent-memory.s (added)
+++ llvm/trunk/test/MC/AArch64/armv8.2a-persistent-memory.s Thu Nov 26 09:28:47 2015
@@ -0,0 +1,6 @@
+// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+v8.2a < %s | FileCheck %s
+// RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=-v8.2a < %s 2>&1 | FileCheck %s --check-prefix=ERROR
+
+  dc cvap, x7
+// CHECK: dc cvap, x7   // encoding: [0x27,0x7c,0x0b,0xd5]
+// ERROR: error: DC CVAP requires ARMv8.2a

Added: llvm/trunk/test/MC/Disassembler/AArch64/armv8.2a-persistent-memory.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/AArch64/armv8.2a-persistent-memory.txt?rev=254156&view=auto
==============================================================================
--- llvm/trunk/test/MC/Disassembler/AArch64/armv8.2a-persistent-memory.txt (added)
+++ llvm/trunk/test/MC/Disassembler/AArch64/armv8.2a-persistent-memory.txt Thu Nov 26 09:28:47 2015
@@ -0,0 +1,6 @@
+# RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8.2a --disassemble < %s | FileCheck %s
+# RUN: llvm-mc -triple aarch64-none-linux-gnu --disassemble < %s | FileCheck --check-prefix=NO_V82 %s
+
+[0x27,0x7c,0x0b,0xd5]
+# CHECK: dc cvap, x7
+# NO_V82: sys #3, c7, c12, #1, x7