[llvm] r242714 - [ARM] Refactor the prologue/epilogue emission to be more robust.

Wed Nov 25 11:26:29 PST 2015

Re-send with the correct list.

On 11/25/15 12:25 PM, Jonathan Roelofs wrote:
>
>
> On 7/20/15 3:42 PM, Quentin Colombet wrote:
>> Author: qcolombet
>> Date: Mon Jul 20 16:42:14 2015
>> New Revision: 242714
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=242714&view=rev
>> Log:
>> [ARM] Refactor the prologue/epilogue emission to be more robust.
>>
>> This is the first step toward supporting shrink-wrapping for this target.
>>
>> The changes could be summarized by these items:
>> - Expand the tail-call return as part of the expand pseudo pass.
>> - Get rid of the assumptions that the epilogue is the exit block:
>>    * Do not assume which registers are free in the epilogue. (This
>> indirectly
>>      improve the lowering of the code for the segmented stacks, see
>> the test
>>      cases.)
>>    * Take into account that the basic block can be empty.
>>
>> Related to <rdar://problem/20821730>
>>
>
> snip
>
>> Modified: llvm/trunk/test/CodeGen/ARM/thumb1_return_sequence.ll
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/thumb1_return_sequence.ll?rev=242714&r1=242713&r2=242714&view=diff
>>
>> ==============================================================================
>>
>> --- llvm/trunk/test/CodeGen/ARM/thumb1_return_sequence.ll (original)
>> +++ llvm/trunk/test/CodeGen/ARM/thumb1_return_sequence.ll Mon Jul 20
>> 16:42:14 2015
>> @@ -23,11 +23,9 @@ entry:
>>   ; --------
>>   ; CHECK-V4T:         add sp,
>>   ; CHECK-V4T-NEXT:    pop {[[SAVED]]}
>> -; CHECK-V4T-NEXT:    mov r12, r3
>> -; CHECK-V4T-NEXT:    pop {r3}
>> -; CHECK-V4T-NEXT:    mov lr, r3
>> -; CHECK-V4T-NEXT:    mov r3, r12
>> -; CHECK-V4T:         bx  lr
>> +; We do not have any SP update to insert so we can just optimize
>> +; the pop sequence.
>> +; CHECK-V4T-NEXT:    pop {pc}
>
> This ^ is an invalid optimization. The awkward sequence there is
> necessary because:
>
>   Arch constraints:
>     * v4t can't change the thumb bit via a `pop { pc }` insruction
>     * v4t can only pop into lo registers and the pc
>         (and bit[0] of the value popped into pc must be 0 if pc is in
>          the list)
>     * v4t can't move from a lo register to a lo register
>
>   AAPCS constraints:
>     * r3 needs to be saved off in case it is used as part of the return
>         value.
>     * r12 is the only register we're allowed to clobber.
>
>>   ; CHECK-V5T:         pop {[[SAVED]], pc}
>>   }
>>
>> @@ -53,19 +51,19 @@ entry:
>>   ; Epilogue
>>   ; --------
>>   ; CHECK-V4T:         pop {[[SAVED]]}
>> -; CHECK-V4T-NEXT:    mov r12, r3
>> -; CHECK-V4T-NEXT:    pop {r3}
>> +; CHECK-V4T-NEXT:    mov r12, [[POP_REG:r[0-7]]]
>> +; CHECK-V4T-NEXT:    pop {[[POP_REG]]}
>>   ; CHECK-V4T-NEXT:    add sp,
>> -; CHECK-V4T-NEXT:    mov lr, r3
>> -; CHECK-V4T-NEXT:    mov r3, r12
>> +; CHECK-V4T-NEXT:    mov lr, [[POP_REG]]
>> +; CHECK-V4T-NEXT:    mov [[POP_REG]], r12
>>   ; CHECK-V4T:         bx  lr
>>   ; CHECK-V5T:         add sp,
>>   ; CHECK-V5T-NEXT:    pop {[[SAVED]]}
>> -; CHECK-V5T-NEXT:    mov r12, r3
>> -; CHECK-V5T-NEXT:    pop {r3}
>> +; CHECK-V5T-NEXT:    mov r12, [[POP_REG:r[0-7]]]
>> +; CHECK-V5T-NEXT:    pop {[[POP_REG]]}
>>   ; CHECK-V5T-NEXT:    add sp,
>> -; CHECK-V5T-NEXT:    mov lr, r3
>> -; CHECK-V5T-NEXT:    mov r3, r12
>> +; CHECK-V5T-NEXT:    mov lr, [[POP_REG]]
>> +; CHECK-V5T-NEXT:    mov [[POP_REG]], r12
>>   ; CHECK-V5T-NEXT:    bx lr
>>   }
>>
>> @@ -95,8 +93,7 @@ entry:
>>   ; Epilogue
>>   ; --------
>>   ; CHECK-V4T:    pop {[[SAVED]]}
>> -; CHECK-V4T:    pop {r3}
>> -; CHECK-V4T:    bx r3
>> +; CHECK-V4T:    pop {pc}
>
> This ^ is also invalid for the same reason.
>
>>   ; CHECK-V5T:    pop {[[SAVED]], pc}
>>   }
>>
>> @@ -148,14 +145,18 @@ entry:
>>   ; --------
>>   ; CHECK-V4T:         add sp,
>>   ; CHECK-V4T-NEXT:    pop {[[SAVED]]}
>> -; CHECK-V4T-NEXT:    pop {r3}
>> +; Only r1 to r3 are available to pop LR.
>> +; r0 is used for the return value.
>> +; CHECK-V4T-NEXT:    pop {[[POP_REG:r[1-3]]]}
>>   ; CHECK-V4T-NEXT:    add sp,
>> -; CHECK-V4T-NEXT:    bx r3
>> +; CHECK-V4T-NEXT:    bx [[POP_REG]]
>>   ; CHECK-V5T:         add sp,
>>   ; CHECK-V5T-NEXT:    pop {[[SAVED]]}
>> -; CHECK-V5T-NEXT:    pop {r3}
>> +; Only r1 to r3 are available to pop LR.
>> +; r0 is used for the return value.
>> +; CHECK-V5T-NEXT:    pop {[[POP_REG:r[1-3]]]}
>>   ; CHECK-V5T-NEXT:    add sp,
>> -; CHECK-V5T-NEXT:    bx r3
>> +; CHECK-V5T-NEXT:    bx [[POP_REG]]
>>   }
>>
>>   ; CHECK-V4T-LABEL: noframe
>> @@ -191,13 +192,17 @@ entry:
>>   ; Epilogue
>>   ; --------
>>   ; CHECK-V4T:         pop {[[SAVED]]}
>> -; CHECK-V4T-NEXT:    pop {r3}
>> +; Only r1 to r3 are available to pop LR.
>> +; r0 is used for the return value.
>> +; CHECK-V4T-NEXT:    pop {[[POP_REG:r[1-3]]]}
>>   ; CHECK-V4T-NEXT:    add sp,
>> -; CHECK-V4T-NEXT:    bx r3
>> +; CHECK-V4T-NEXT:    bx [[POP_REG]]
>>   ; CHECK-V5T:         pop {[[SAVED]]}
>> -; CHECK-V5T-NEXT:    pop {r3}
>> +; Only r1 to r3 are available to pop LR.
>> +; r0 is used for the return value.
>> +; CHECK-V5T-NEXT:    pop {[[POP_REG:r[1-3]]]}
>>   ; CHECK-V5T-NEXT:    add sp,
>> -; CHECK-V5T-NEXT:    bx r3
>> +; CHECK-V5T-NEXT:    bx [[POP_REG]]
>>   }
>>
>>   declare void @llvm.va_start(i8*) nounwind
>>
>
> snip
>
>>
>> _______________________________________________
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>>
>

-- 
Jon Roelofs
jonathan at codesourcery.com
CodeSourcery / Mentor Embedded