[llvm] r254079 - [WebAssembly] Clean up several FIXME comments.
Dan Gohman via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 25 10:13:18 PST 2015
Author: djg
Date: Wed Nov 25 12:13:18 2015
New Revision: 254079
URL: http://llvm.org/viewvc/llvm-project?rev=254079&view=rev
Log:
[WebAssembly] Clean up several FIXME comments.
Modified:
llvm/trunk/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp
llvm/trunk/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp
llvm/trunk/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrMemory.td
llvm/trunk/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp
llvm/trunk/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Modified: llvm/trunk/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp?rev=254079&r1=254078&r2=254079&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp (original)
+++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp Wed Nov 25 12:13:18 2015
@@ -65,7 +65,7 @@ void WebAssemblyFrameLowering::eliminate
void WebAssemblyFrameLowering::emitPrologue(MachineFunction &MF,
MachineBasicBlock &MBB) const {
- // FIXME: Implement WebAssemblyFrameLowering::emitPrologue.
+ llvm_unreachable("TODO: implement emitPrologue");
}
void WebAssemblyFrameLowering::emitEpilogue(MachineFunction &MF,
Modified: llvm/trunk/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp?rev=254079&r1=254078&r2=254079&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp Wed Nov 25 12:13:18 2015
@@ -87,7 +87,7 @@ SDNode *WebAssemblyDAGToDAGISel::Select(
switch (Node->getOpcode()) {
default:
break;
- // FIXME: Implement WebAssembly-specific selection.
+ // If we need WebAssembly-specific selection, it would go here.
(void)VT;
}
Modified: llvm/trunk/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp?rev=254079&r1=254078&r2=254079&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp Wed Nov 25 12:13:18 2015
@@ -38,7 +38,8 @@ using namespace llvm;
namespace {
// Diagnostic information for unimplemented or unsupported feature reporting.
-// FIXME copied from BPF and AMDGPU.
+// TODO: This code is copied from BPF and AMDGPU; consider factoring it out
+// and sharing code.
class DiagnosticInfoUnsupported final : public DiagnosticInfo {
private:
// Debug location where this diagnostic is triggered.
@@ -387,7 +388,8 @@ SDValue WebAssemblyTargetLowering::Lower
fail(DL, DAG, "WebAssembly hasn't implemented cons regs arguments");
if (In.Flags.isInConsecutiveRegsLast())
fail(DL, DAG, "WebAssembly hasn't implemented cons regs last arguments");
- // FIXME Do something with In.getOrigAlign()?
+ // Ignore In.getOrigAlign() because all our arguments are passed in
+ // registers.
InVals.push_back(
In.Used
? DAG.getNode(WebAssemblyISD::ARGUMENT, DL, In.VT,
Modified: llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrMemory.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrMemory.td?rev=254079&r1=254078&r2=254079&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrMemory.td (original)
+++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrMemory.td Wed Nov 25 12:13:18 2015
@@ -12,7 +12,7 @@
///
//===----------------------------------------------------------------------===//
-// FIXME:
+// TODO:
// - HasAddr64
// - WebAssemblyTargetLowering::isLegalAddressingMode
// - WebAssemblyTargetLowering having to do with atomics
Modified: llvm/trunk/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp?rev=254079&r1=254078&r2=254079&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp Wed Nov 25 12:13:18 2015
@@ -54,7 +54,7 @@ WebAssemblyRegisterInfo::getReservedRegs
void WebAssemblyRegisterInfo::eliminateFrameIndex(
MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum,
RegScavenger *RS) const {
- llvm_unreachable("WebAssemblyRegisterInfo::eliminateFrameIndex"); // FIXME
+ llvm_unreachable("TODO: implement WebAssemblyRegisterInfo::eliminateFrameIndex");
}
unsigned
Modified: llvm/trunk/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp?rev=254079&r1=254078&r2=254079&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp Wed Nov 25 12:13:18 2015
@@ -134,9 +134,8 @@ FunctionPass *WebAssemblyPassConfig::cre
//===----------------------------------------------------------------------===//
void WebAssemblyPassConfig::addIRPasses() {
- // FIXME: the default for this option is currently POSIX, whereas
- // WebAssembly's MVP should default to Single.
if (TM->Options.ThreadModel == ThreadModel::Single)
+ // In "single" mode, atomics get lowered to non-atomics.
addPass(createLowerAtomicPass());
else
// Expand some atomic operations. WebAssemblyTargetLowering has hooks which
@@ -168,8 +167,9 @@ void WebAssemblyPassConfig::addPreRegAll
}
void WebAssemblyPassConfig::addPostRegAlloc() {
- // FIXME: the following passes dislike virtual registers. Disable them for now
- // so that basic tests can pass. Future patches will remedy this.
+ // TODO: The following CodeGen passes don't currently support code containing
+ // virtual registers. Consider removing their restrictions and re-enabling
+ // them.
//
// Fails with: Regalloc must assign all vregs.
disablePass(&PrologEpilogCodeInserterID);
More information about the llvm-commits
mailing list