[PATCH] D14588: [X86][SSE] Transform truncation from v8i32/v16i32 to v8i8/v16i8 into bitand and X86ISD::PACKUS operations during DAG combine.

[Cong Hou via llvm-commits]

congh added a comment.

In http://reviews.llvm.org/D14588#296349, @congh wrote:

> Update the patch according to Simon's comments.
>
> The optimization in this patch now covers more truncations with vXi32/vXi64 to vXi8/vXi16 for X >= 8.


Agree

In http://reviews.llvm.org/D14588#295639, @RKSimon wrote:

> I think you need to rebase after http://reviews.llvm.org/rL253952
>
> You should be able to support packing with packssdw as well - it would allow us to truncate vXi32 -> vXi16 on SSE2 targets


Agree. I have updated the patch to support this truncation as well. PTAL.


================
Comment at: test/CodeGen/X86/vector-trunc.ll:270
@@ -292,2 +269,3 @@
 ; SSSE3-LABEL: trunc16i32_16i8:
 ; SSSE3:       # BB#0: # %entry
+; SSSE3-NEXT:    movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0]
----------------
RKSimon wrote:
> Aren't the SSE2/SSSE3/SSSE41 checks the same now? Shouldn't they just use SSE-CHECK ? Try to use update_llc_test_checks.py if you can.
Thanks so much for the advice of using update_llc_test_checks.py! It automatically combines tests of SSE2/SSSE3/SSSE41 into SSE test only. 


http://reviews.llvm.org/D14588