RFC: Intel386 psABI version 1.1 draft

[H.J. Lu via llvm-commits]

On Tue, Nov 24, 2015 at 9:09 AM, Thiago Macieira <thiago at macieira.org> wrote:
> On Tuesday 24 November 2015 08:16:40 H.J. Lu wrote:
>> Hi,
>>
>> Here is the Intel386 psABI version 1.1 draft:
>>
>> https://github.com/hjl-tools/x86-psABI/wiki/intel386-psABI-20151120.pdf
>>
>> Main changes are
>>
>> 1. Add AVX-512 support.
>> 2. Add linker optimization to combine GOTPLT and GOT slots.
>> 3. Add R_386_GOT32X relocation and linker optimization.
>> 4. Add FS/GS Base addresses to DWARF register number mapping.
>> 5. Add Intel MPX support.
>>
>> MPX supported has been checked into GCC 5.  Linker optimization has
>> been added to ld in binutils 2.25 and gold in binutils 2.26.  Gold and ld in
>> binutils 2.26 supports new relocations.  Ld in binutils 2.26 can optimize
>> new relocations.
>>
>> Any comments and feedbacks?
>
> Hi H.J.
>
> The doc does not specify whether the AVX-512 mask registers are callee- or
> caller-saved. I imagine, like all new registers, they are all caller-saved,
> but it would be nice to be explicit and add them to the table of registers.
> The MPX registers should also be listed and remark that they are special, to
> see the chapter on them.

Fixed on hjl/x86/master branch.

> Besides that, I have a couple of editorial comments, like missing closing
> parentheses. How would you prefer to receive them? A patch to the .tex files?
>


Please send me a patch against hjl/x86/master branch.

Thanks.

-- 
H.J.