[PATCH] D14851: Add Branch Hints for Highly Biased Branches on PPC
hfinkel@anl.gov via llvm-commits
llvm-commits at lists.llvm.org
Mon Nov 23 17:00:26 PST 2015
hfinkel added a comment.
Looks like PPCInstrInfo::SubsumesPredicate also needs to be updated, as does PPCInstrInfo::optimizeCompareInstr (to ignore the hinting bits).
================
Comment at: lib/Target/PowerPC/MCTargetDesc/PPCPredicates.h:60
@@ +59,3 @@
+ // Bit mask for branch taken/not-taken hint
+ const unsigned PRED_NOT_TAKEN_HINT = 0x2;
+ const unsigned PRED_TAKEN_HINT = 0x3;
----------------
Use an enum for these.
================
Comment at: lib/Target/PowerPC/PPCISelDAGToDAG.cpp:57
@@ +56,3 @@
+ "ppc-enable-branch-hint",
+ cl::desc("Enable branch with hint codegen on ppc for cases which are easy to "
+ "predict at static time, e.g. c++ throw statement is very likely not "
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These appear in a command-line -help-hidden list, and this description is uncharacteristically long. Shorten this. "Enable static hinting of branches on ppc" is fine, for example.
Feel free to include a more-verbose description in a comment.
================
Comment at: lib/Target/PowerPC/PPCISelDAGToDAG.cpp:2403
@@ +2402,3 @@
+ if (TWeight > FWeight) PCC |= PPC::PRED_TAKEN_HINT;
+ else PCC |= PPC::PRED_NOT_TAKEN_HINT;
+}
----------------
PCC |= (TWeight > FWeight) ? PPC::PRED_TAKEN_HINT : PCC |= PPC::PRED_NOT_TAKEN_HINT;
================
Comment at: lib/Target/PowerPC/PPCISelDAGToDAG.cpp:2894
@@ -2844,3 +2893,3 @@
SDValue Pred =
getI32Imm(cast<ConstantSDNode>(N->getOperand(1))->getZExtValue(), dl);
SDValue Ops[] = { Pred, N->getOperand(2), N->getOperand(3),
----------------
Should you do something here too?
================
Comment at: lib/Target/PowerPC/PPCInstrInfo.cpp:713
@@ +712,3 @@
+ // isel is for branch without branch-hint only (0x2: none-taken, 0x3: taken)
+ if (Cond[0].getImm() & PPC::PRED_HINT_MASK)
+ return false;
----------------
This might be good for POWER cores, but not for the A2. At least, don't do this when targeting the A2.
http://reviews.llvm.org/D14851
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