[PATCH] D14890: Add new vector types for 512-, 1024- and 2048-bit vectors

[Craig Topper via llvm-commits]

craig.topper added a subscriber: craig.topper.

================
Comment at: include/llvm/CodeGen/MachineValueType.h:65
@@ -64,26 +64,3 @@
       v64i1          =  18,   // 64 x i1
-
-      v1i8           =  19,   //  1 x i8
-      v2i8           =  20,   //  2 x i8
-      v4i8           =  21,   //  4 x i8
-      v8i8           =  22,   //  8 x i8
-      v16i8          =  23,   // 16 x i8
-      v32i8          =  24,   // 32 x i8
-      v64i8          =  25,   // 64 x i8
-      v1i16          =  26,   //  1 x i16
-      v2i16          =  27,   //  2 x i16
-      v4i16          =  28,   //  4 x i16
-      v8i16          =  29,   //  8 x i16
-      v16i16         =  30,   // 16 x i16
-      v32i16         =  31,   // 32 x i16
-      v1i32          =  32,   //  1 x i32
-      v2i32          =  33,   //  2 x i32
-      v4i32          =  34,   //  4 x i32
-      v8i32          =  35,   //  8 x i32
-      v16i32         =  36,   // 16 x i32
-      v1i64          =  37,   //  1 x i64
-      v2i64          =  38,   //  2 x i64
-      v4i64          =  39,   //  4 x i64
-      v8i64          =  40,   //  8 x i64
-      v16i64         =  41,   // 16 x i64
-      v1i128         =  42,   //  1 x i128
+      v512i1         =  19,   //   512 x i1
+      v1024i1        =  20,   //  1024 x i1
----------------
Realign the earlier comments so everything is nicely columned.

================
Comment at: include/llvm/CodeGen/MachineValueType.h:142
@@ -128,3 +141,3 @@
       // This value must be a multiple of 32.
-      MAX_ALLOWED_VALUETYPE = 64,
+      MAX_ALLOWED_VALUETYPE = 128,
 
----------------
This only needs to be a multiple of 32 so 96 would be the next number not 128.

================
Comment at: include/llvm/CodeGen/MachineValueType.h:260
@@ -247,1 +259,3 @@
+              SimpleTy == MVT::v512i1 ||
+              SimpleTy == MVT::v8i64  || SimpleTy == MVT::v16i32);
     }
----------------
Please sort these by  increasing scalar size like the existing orders. And only shorten the last line not one in the middle

================
Comment at: include/llvm/CodeGen/MachineValueType.h:593
@@ -543,1 +592,3 @@
+        if (NumElements == 512) return MVT::v512i1;
+        if (NumElements == 1024) return MVT::v1024i1;
         break;
----------------
Line up all the returns.

================
Comment at: include/llvm/CodeGen/MachineValueType.h:603
@@ -551,1 +602,3 @@
         if (NumElements == 64) return MVT::v64i8;
+        if (NumElements == 128) return MVT::v128i8;
+        if (NumElements == 256) return MVT::v256i8;
----------------
Line Up the earlier returns with the new one.

================
Comment at: include/llvm/CodeGen/MachineValueType.h:613
@@ -559,1 +612,3 @@
         if (NumElements == 32) return MVT::v32i16;
+        if (NumElements == 64) return MVT::v64i16;
+        if (NumElements == 128) return MVT::v128i16;
----------------
Line up the earlier returns with the new ones


Repository:
  rL LLVM

http://reviews.llvm.org/D14890