[llvm] r253878 - [WebAssembly] Emit .param, .result, and .local through MC.
Dan Gohman via llvm-commits
llvm-commits at lists.llvm.org
Mon Nov 23 08:50:18 PST 2015
Author: djg
Date: Mon Nov 23 10:50:18 2015
New Revision: 253878
URL: http://llvm.org/viewvc/llvm-project?rev=253878&view=rev
Log:
[WebAssembly] Emit .param, .result, and .local through MC.
This eliminates one of the main remaining uses of EmitRawText.
Modified:
llvm/trunk/lib/Target/WebAssembly/InstPrinter/WebAssemblyInstPrinter.cpp
llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/CMakeLists.txt
llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp
llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h
llvm/trunk/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrInfo.td
llvm/trunk/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
llvm/trunk/test/CodeGen/WebAssembly/call.ll
llvm/trunk/test/CodeGen/WebAssembly/comparisons_f32.ll
llvm/trunk/test/CodeGen/WebAssembly/comparisons_f64.ll
llvm/trunk/test/CodeGen/WebAssembly/comparisons_i32.ll
llvm/trunk/test/CodeGen/WebAssembly/comparisons_i64.ll
llvm/trunk/test/CodeGen/WebAssembly/dead-vreg.ll
llvm/trunk/test/CodeGen/WebAssembly/f32.ll
llvm/trunk/test/CodeGen/WebAssembly/f64.ll
llvm/trunk/test/CodeGen/WebAssembly/func.ll
llvm/trunk/test/CodeGen/WebAssembly/i32.ll
llvm/trunk/test/CodeGen/WebAssembly/i64.ll
llvm/trunk/test/CodeGen/WebAssembly/inline-asm.ll
llvm/trunk/test/CodeGen/WebAssembly/store.ll
llvm/trunk/test/CodeGen/WebAssembly/unused-argument.ll
Modified: llvm/trunk/lib/Target/WebAssembly/InstPrinter/WebAssemblyInstPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/InstPrinter/WebAssemblyInstPrinter.cpp?rev=253878&r1=253877&r2=253878&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/InstPrinter/WebAssemblyInstPrinter.cpp (original)
+++ llvm/trunk/lib/Target/WebAssembly/InstPrinter/WebAssemblyInstPrinter.cpp Mon Nov 23 10:50:18 2015
@@ -15,6 +15,7 @@
#include "InstPrinter/WebAssemblyInstPrinter.h"
#include "WebAssembly.h"
#include "WebAssemblyMachineFunctionInfo.h"
+#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCInstrInfo.h"
@@ -51,7 +52,8 @@ void WebAssemblyInstPrinter::printInst(c
if (Desc.isVariadic())
for (unsigned i = Desc.getNumOperands(), e = MI->getNumOperands(); i < e;
++i) {
- OS << ", ";
+ if (i != 0)
+ OS << ", ";
printOperand(MI, i, OS);
}
@@ -88,9 +90,24 @@ void WebAssemblyInstPrinter::printOperan
O << "$push" << (WAReg & INT32_MAX);
else
O << "$discard";
- } else if (Op.isImm())
- O << Op.getImm();
- else if (Op.isFPImm())
+ } else if (Op.isImm()) {
+ switch (MI->getOpcode()) {
+ case WebAssembly::PARAM:
+ case WebAssembly::RESULT:
+ case WebAssembly::LOCAL:
+ switch (Op.getImm()) {
+ case MVT::i32: O << "i32"; break;
+ case MVT::i64: O << "i64"; break;
+ case MVT::f32: O << "f32"; break;
+ case MVT::f64: O << "f64"; break;
+ default: llvm_unreachable("unexpected type");
+ }
+ break;
+ default:
+ O << Op.getImm();
+ break;
+ }
+ } else if (Op.isFPImm())
O << toString(APFloat(Op.getFPImm()));
else {
assert(Op.isExpr() && "unknown operand kind in printOperand");
Modified: llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/CMakeLists.txt?rev=253878&r1=253877&r2=253878&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/CMakeLists.txt (original)
+++ llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/CMakeLists.txt Mon Nov 23 10:50:18 2015
@@ -1,4 +1,5 @@
add_llvm_library(LLVMWebAssemblyDesc
WebAssemblyMCAsmInfo.cpp
+ WebAssemblyMCCodeEmitter.cpp
WebAssemblyMCTargetDesc.cpp
)
Modified: llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp?rev=253878&r1=253877&r2=253878&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp (original)
+++ llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp Mon Nov 23 10:50:18 2015
@@ -65,5 +65,8 @@ extern "C" void LLVMInitializeWebAssembl
// Register the MCInstPrinter.
TargetRegistry::RegisterMCInstPrinter(*T, createWebAssemblyMCInstPrinter);
+
+ // Register the MC code emitter
+ TargetRegistry::RegisterMCCodeEmitter(*T, createWebAssemblyMCCodeEmitter);
}
}
Modified: llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h?rev=253878&r1=253877&r2=253878&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h (original)
+++ llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h Mon Nov 23 10:50:18 2015
@@ -34,13 +34,18 @@ class StringRef;
class Target;
class Triple;
class raw_ostream;
+class raw_pwrite_stream;
extern Target TheWebAssemblyTarget32;
extern Target TheWebAssemblyTarget64;
+MCCodeEmitter *createWebAssemblyMCCodeEmitter(const MCInstrInfo &MCII,
+ const MCRegisterInfo &MRI,
+ MCContext &Ctx);
+
MCAsmBackend *createWebAssemblyAsmBackend(const Target &T,
const MCRegisterInfo &MRI,
- StringRef TT, StringRef CPU);
+ const Triple &TT, StringRef CPU);
} // end namespace llvm
Modified: llvm/trunk/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp?rev=253878&r1=253877&r2=253878&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp Mon Nov 23 10:50:18 2015
@@ -84,7 +84,7 @@ private:
unsigned AsmVariant, const char *ExtraCode,
raw_ostream &OS) override;
- std::string getRegTypeName(unsigned RegNo) const;
+ MVT getRegType(unsigned RegNo) const;
const char *toString(MVT VT) const;
std::string regToString(const MachineOperand &MO);
};
@@ -95,14 +95,14 @@ private:
// Helpers.
//===----------------------------------------------------------------------===//
-std::string WebAssemblyAsmPrinter::getRegTypeName(unsigned RegNo) const {
+MVT WebAssemblyAsmPrinter::getRegType(unsigned RegNo) const {
const TargetRegisterClass *TRC = MRI->getRegClass(RegNo);
for (MVT T : {MVT::i32, MVT::i64, MVT::f32, MVT::f64})
if (TRC->hasType(T))
- return EVT(T).getEVTString();
+ return T;
DEBUG(errs() << "Unknown type for register number: " << RegNo);
llvm_unreachable("Unknown register type");
- return "?";
+ return MVT::Other;
}
std::string WebAssemblyAsmPrinter::regToString(const MachineOperand &MO) {
@@ -165,21 +165,30 @@ static void ComputeLegalValueVTs(const F
}
void WebAssemblyAsmPrinter::EmitFunctionBodyStart() {
- SmallString<128> Str;
- raw_svector_ostream OS(Str);
+ if (!MFI->getParams().empty()) {
+ MCInst Param;
+ Param.setOpcode(WebAssembly::PARAM);
+ for (MVT VT : MFI->getParams())
+ Param.addOperand(MCOperand::createImm(VT.SimpleTy));
+ EmitToStreamer(*OutStreamer, Param);
+ }
- for (MVT VT : MFI->getParams())
- OS << "\t" ".param " << toString(VT) << '\n';
SmallVector<MVT, 4> ResultVTs;
const Function &F(*MF->getFunction());
ComputeLegalValueVTs(F, TM, F.getReturnType(), ResultVTs);
// If the return type needs to be legalized it will get converted into
// passing a pointer.
- if (ResultVTs.size() == 1)
- OS << "\t" ".result " << toString(ResultVTs.front()) << '\n';
+ if (ResultVTs.size() == 1) {
+ MCInst Result;
+ Result.setOpcode(WebAssembly::RESULT);
+ Result.addOperand(MCOperand::createImm(ResultVTs.front().SimpleTy));
+ EmitToStreamer(*OutStreamer, Result);
+ }
- bool FirstWAReg = true;
+ bool AnyWARegs = false;
+ MCInst Local;
+ Local.setOpcode(WebAssembly::LOCAL);
for (unsigned Idx = 0, IdxE = MRI->getNumVirtRegs(); Idx != IdxE; ++Idx) {
unsigned VReg = TargetRegisterInfo::index2VirtReg(Idx);
unsigned WAReg = MFI->getWAReg(VReg);
@@ -192,20 +201,12 @@ void WebAssemblyAsmPrinter::EmitFunction
// Don't declare stackified registers.
if (int(WAReg) < 0)
continue;
- if (FirstWAReg)
- OS << "\t" ".local ";
- else
- OS << ", ";
- OS << getRegTypeName(VReg);
- FirstWAReg = false;
+ Local.addOperand(MCOperand::createImm(getRegType(VReg).SimpleTy));
+ AnyWARegs = true;
}
- if (!FirstWAReg)
- OS << '\n';
+ if (AnyWARegs)
+ EmitToStreamer(*OutStreamer, Local);
- // EmitRawText appends a newline, so strip off the last newline.
- StringRef Text = OS.str();
- if (!Text.empty())
- OutStreamer->EmitRawText(Text.substr(0, Text.size() - 1));
AsmPrinter::EmitFunctionBodyStart();
}
@@ -283,6 +284,8 @@ void WebAssemblyAsmPrinter::EmitEndOfAsm
StringRef Text = OS.str();
if (!Text.empty())
OutStreamer->EmitRawText(Text.substr(0, Text.size() - 1));
+
+ AsmPrinter::EmitEndOfAsmFile(M);
}
bool WebAssemblyAsmPrinter::PrintAsmOperand(const MachineInstr *MI,
Modified: llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrInfo.td?rev=253878&r1=253877&r2=253878&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrInfo.td (original)
+++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrInfo.td Mon Nov 23 10:50:18 2015
@@ -124,6 +124,11 @@ def JUMP_TABLE : I<(outs I32:$dst), (ins
[(set I32:$dst, (WebAssemblywrapper tjumptable:$addr))],
"jump_table\t$dst, $addr">;
+// Function signature and local variable declaration "instructions".
+def PARAM : I<(outs), (ins variable_ops), [], ".param \t">;
+def RESULT : I<(outs), (ins variable_ops), [], ".result \t">;
+def LOCAL : I<(outs), (ins variable_ops), [], ".local \t">;
+
//===----------------------------------------------------------------------===//
// Additional sets of instructions.
//===----------------------------------------------------------------------===//
Modified: llvm/trunk/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp?rev=253878&r1=253877&r2=253878&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp Mon Nov 23 10:50:18 2015
@@ -20,6 +20,7 @@
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/RegAllocRegistry.h"
+#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
#include "llvm/IR/Function.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/TargetRegistry.h"
Modified: llvm/trunk/test/CodeGen/WebAssembly/call.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/call.ll?rev=253878&r1=253877&r2=253878&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/call.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/call.ll Mon Nov 23 10:50:18 2015
@@ -14,7 +14,7 @@ declare double @double_nullary()
declare void @void_nullary()
; CHECK-LABEL: call_i32_nullary:
-; CHECK-NEXT: .result i32
+; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: call i32_nullary, $push[[NUM:[0-9]+]]{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @call_i32_nullary() {
@@ -23,7 +23,7 @@ define i32 @call_i32_nullary() {
}
; CHECK-LABEL: call_i64_nullary:
-; CHECK-NEXT: .result i64
+; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: call i64_nullary, $push[[NUM:[0-9]+]]{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i64 @call_i64_nullary() {
@@ -32,7 +32,7 @@ define i64 @call_i64_nullary() {
}
; CHECK-LABEL: call_float_nullary:
-; CHECK-NEXT: .result f32
+; CHECK-NEXT: .result f32{{$}}
; CHECK-NEXT: call float_nullary, $push[[NUM:[0-9]+]]{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define float @call_float_nullary() {
@@ -41,7 +41,7 @@ define float @call_float_nullary() {
}
; CHECK-LABEL: call_double_nullary:
-; CHECK-NEXT: .result f64
+; CHECK-NEXT: .result f64{{$}}
; CHECK-NEXT: call double_nullary, $push[[NUM:[0-9]+]]{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define double @call_double_nullary() {
@@ -58,8 +58,8 @@ define void @call_void_nullary() {
}
; CHECK-LABEL: call_i32_unary:
-; CHECK-NEXT: .param i32
-; CHECK-NEXT: .result i32
+; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: call i32_unary, $push[[NUM:[0-9]+]], $0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @call_i32_unary(i32 %a) {
@@ -68,9 +68,8 @@ define i32 @call_i32_unary(i32 %a) {
}
; CHECK-LABEL: call_i32_binary:
-; CHECK-NEXT: .param i32
-; CHECK-NEXT: .param i32
-; CHECK-NEXT: .result i32
+; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: call i32_binary, $push[[NUM:[0-9]+]], $0, $1{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @call_i32_binary(i32 %a, i32 %b) {
@@ -79,7 +78,7 @@ define i32 @call_i32_binary(i32 %a, i32
}
; CHECK-LABEL: call_indirect_void:
-; CHECK-NEXT: .param i32
+; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: call_indirect $0{{$}}
; CHECK-NEXT: return{{$}}
define void @call_indirect_void(void ()* %callee) {
@@ -88,8 +87,8 @@ define void @call_indirect_void(void ()*
}
; CHECK-LABEL: call_indirect_i32:
-; CHECK-NEXT: .param i32
-; CHECK-NEXT: .result i32
+; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: call_indirect $0, $push[[NUM:[0-9]+]]{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @call_indirect_i32(i32 ()* %callee) {
Modified: llvm/trunk/test/CodeGen/WebAssembly/comparisons_f32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/comparisons_f32.ll?rev=253878&r1=253877&r2=253878&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/comparisons_f32.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/comparisons_f32.ll Mon Nov 23 10:50:18 2015
@@ -7,8 +7,7 @@ target datalayout = "e-p:32:32-i64:64-n3
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: ord_f32:
-; CHECK-NEXT: .param f32{{$}}
-; CHECK-NEXT: .param f32{{$}}
+; CHECK-NEXT: .param f32, f32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: f32.eq $push[[NUM0:[0-9]+]], $0, $0{{$}}
; CHECK-NEXT: f32.eq $push[[NUM1:[0-9]+]], $1, $1{{$}}
@@ -21,8 +20,7 @@ define i32 @ord_f32(float %x, float %y)
}
; CHECK-LABEL: uno_f32:
-; CHECK-NEXT: .param f32{{$}}
-; CHECK-NEXT: .param f32{{$}}
+; CHECK-NEXT: .param f32, f32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: f32.ne $push[[NUM0:[0-9]+]], $0, $0{{$}}
; CHECK-NEXT: f32.ne $push[[NUM1:[0-9]+]], $1, $1{{$}}
@@ -35,8 +33,7 @@ define i32 @uno_f32(float %x, float %y)
}
; CHECK-LABEL: oeq_f32:
-; CHECK-NEXT: .param f32{{$}}
-; CHECK-NEXT: .param f32{{$}}
+; CHECK-NEXT: .param f32, f32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: f32.eq $push[[NUM:[0-9]+]], $0, $1{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
@@ -94,8 +91,7 @@ define i32 @oge_f32(float %x, float %y)
; Expanded comparisons, which also check for NaN.
; CHECK-LABEL: ueq_f32:
-; CHECK-NEXT: .param f32{{$}}
-; CHECK-NEXT: .param f32{{$}}
+; CHECK-NEXT: .param f32, f32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: f32.eq $push[[NUM0:[0-9]+]], $0, $1{{$}}
; CHECK-NEXT: f32.ne $push[[NUM1:[0-9]+]], $0, $0{{$}}
@@ -111,7 +107,6 @@ define i32 @ueq_f32(float %x, float %y)
; CHECK-LABEL: one_f32:
; CHECK-NEXT: .param f32
-; CHECK-NEXT: .param f32
; CHECK-NEXT: .result i32
; CHECK-NEXT: f32.ne $push[[NUM0:[0-9]+]], $0, $1{{$}}
; CHECK-NEXT: f32.eq $push[[NUM1:[0-9]+]], $0, $0{{$}}
@@ -126,8 +121,7 @@ define i32 @one_f32(float %x, float %y)
}
; CHECK-LABEL: ult_f32:
-; CHECK-NEXT: .param f32{{$}}
-; CHECK-NEXT: .param f32{{$}}
+; CHECK-NEXT: .param f32, f32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: f32.lt $push[[NUM0:[0-9]+]], $0, $1{{$}}
; CHECK-NEXT: f32.ne $push[[NUM1:[0-9]+]], $0, $0{{$}}
@@ -142,8 +136,7 @@ define i32 @ult_f32(float %x, float %y)
}
; CHECK-LABEL: ule_f32:
-; CHECK-NEXT: .param f32{{$}}
-; CHECK-NEXT: .param f32{{$}}
+; CHECK-NEXT: .param f32, f32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: f32.le $push[[NUM0:[0-9]+]], $0, $1{{$}}
; CHECK-NEXT: f32.ne $push[[NUM1:[0-9]+]], $0, $0{{$}}
@@ -158,8 +151,7 @@ define i32 @ule_f32(float %x, float %y)
}
; CHECK-LABEL: ugt_f32:
-; CHECK-NEXT: .param f32{{$}}
-; CHECK-NEXT: .param f32{{$}}
+; CHECK-NEXT: .param f32, f32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: f32.gt $push[[NUM0:[0-9]+]], $0, $1{{$}}
; CHECK-NEXT: f32.ne $push[[NUM1:[0-9]+]], $0, $0{{$}}
@@ -174,8 +166,7 @@ define i32 @ugt_f32(float %x, float %y)
}
; CHECK-LABEL: uge_f32:
-; CHECK-NEXT: .param f32{{$}}
-; CHECK-NEXT: .param f32{{$}}
+; CHECK-NEXT: .param f32, f32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: f32.ge $push[[NUM0:[0-9]+]], $0, $1{{$}}
; CHECK-NEXT: f32.ne $push[[NUM1:[0-9]+]], $0, $0{{$}}
Modified: llvm/trunk/test/CodeGen/WebAssembly/comparisons_f64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/comparisons_f64.ll?rev=253878&r1=253877&r2=253878&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/comparisons_f64.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/comparisons_f64.ll Mon Nov 23 10:50:18 2015
@@ -7,8 +7,7 @@ target datalayout = "e-p:32:32-i64:64-n3
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: ord_f64:
-; CHECK-NEXT: .param f64{{$}}
-; CHECK-NEXT: .param f64{{$}}
+; CHECK-NEXT: .param f64, f64{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: f64.eq $push[[NUM0:[0-9]+]], $0, $0{{$}}
; CHECK-NEXT: f64.eq $push[[NUM1:[0-9]+]], $1, $1{{$}}
@@ -21,8 +20,7 @@ define i32 @ord_f64(double %x, double %y
}
; CHECK-LABEL: uno_f64:
-; CHECK-NEXT: .param f64{{$}}
-; CHECK-NEXT: .param f64{{$}}
+; CHECK-NEXT: .param f64, f64{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: f64.ne $push[[NUM0:[0-9]+]], $0, $0{{$}}
; CHECK-NEXT: f64.ne $push[[NUM1:[0-9]+]], $1, $1{{$}}
@@ -35,8 +33,7 @@ define i32 @uno_f64(double %x, double %y
}
; CHECK-LABEL: oeq_f64:
-; CHECK-NEXT: .param f64{{$}}
-; CHECK-NEXT: .param f64{{$}}
+; CHECK-NEXT: .param f64, f64{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: f64.eq $push[[NUM:[0-9]+]], $0, $1{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
@@ -94,8 +91,7 @@ define i32 @oge_f64(double %x, double %y
; Expanded comparisons, which also check for NaN.
; CHECK-LABEL: ueq_f64:
-; CHECK-NEXT: .param f64{{$}}
-; CHECK-NEXT: .param f64{{$}}
+; CHECK-NEXT: .param f64, f64{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: f64.eq $push[[NUM0:[0-9]+]], $0, $1{{$}}
; CHECK-NEXT: f64.ne $push[[NUM1:[0-9]+]], $0, $0{{$}}
@@ -111,7 +107,6 @@ define i32 @ueq_f64(double %x, double %y
; CHECK-LABEL: one_f64:
; CHECK-NEXT: .param f64
-; CHECK-NEXT: .param f64
; CHECK-NEXT: .result i32
; CHECK-NEXT: f64.ne $push[[NUM0:[0-9]+]], $0, $1{{$}}
; CHECK-NEXT: f64.eq $push[[NUM1:[0-9]+]], $0, $0{{$}}
@@ -126,8 +121,7 @@ define i32 @one_f64(double %x, double %y
}
; CHECK-LABEL: ult_f64:
-; CHECK-NEXT: .param f64{{$}}
-; CHECK-NEXT: .param f64{{$}}
+; CHECK-NEXT: .param f64, f64{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: f64.lt $push[[NUM0:[0-9]+]], $0, $1{{$}}
; CHECK-NEXT: f64.ne $push[[NUM1:[0-9]+]], $0, $0{{$}}
@@ -142,8 +136,7 @@ define i32 @ult_f64(double %x, double %y
}
; CHECK-LABEL: ule_f64:
-; CHECK-NEXT: .param f64{{$}}
-; CHECK-NEXT: .param f64{{$}}
+; CHECK-NEXT: .param f64, f64{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: f64.le $push[[NUM0:[0-9]+]], $0, $1{{$}}
; CHECK-NEXT: f64.ne $push[[NUM1:[0-9]+]], $0, $0{{$}}
@@ -158,8 +151,7 @@ define i32 @ule_f64(double %x, double %y
}
; CHECK-LABEL: ugt_f64:
-; CHECK-NEXT: .param f64{{$}}
-; CHECK-NEXT: .param f64{{$}}
+; CHECK-NEXT: .param f64, f64{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: f64.gt $push[[NUM0:[0-9]+]], $0, $1{{$}}
; CHECK-NEXT: f64.ne $push[[NUM1:[0-9]+]], $0, $0{{$}}
@@ -174,8 +166,7 @@ define i32 @ugt_f64(double %x, double %y
}
; CHECK-LABEL: uge_f64:
-; CHECK-NEXT: .param f64{{$}}
-; CHECK-NEXT: .param f64{{$}}
+; CHECK-NEXT: .param f64, f64{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: f64.ge $push[[NUM0:[0-9]+]], $0, $1{{$}}
; CHECK-NEXT: f64.ne $push[[NUM1:[0-9]+]], $0, $0{{$}}
Modified: llvm/trunk/test/CodeGen/WebAssembly/comparisons_i32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/comparisons_i32.ll?rev=253878&r1=253877&r2=253878&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/comparisons_i32.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/comparisons_i32.ll Mon Nov 23 10:50:18 2015
@@ -6,8 +6,7 @@ target datalayout = "e-p:32:32-i64:64-n3
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: eq_i32:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.eq $push[[NUM:[0-9]+]], $0, $1{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
Modified: llvm/trunk/test/CodeGen/WebAssembly/comparisons_i64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/comparisons_i64.ll?rev=253878&r1=253877&r2=253878&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/comparisons_i64.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/comparisons_i64.ll Mon Nov 23 10:50:18 2015
@@ -6,8 +6,7 @@ target datalayout = "e-p:32:32-i64:64-n3
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: eq_i64:
-; CHECK-NEXT: .param i64{{$}}
-; CHECK-NEXT: .param i64{{$}}
+; CHECK-NEXT: .param i64, i64{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i64.eq $push[[NUM:[0-9]+]], $0, $1{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
Modified: llvm/trunk/test/CodeGen/WebAssembly/dead-vreg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/dead-vreg.ll?rev=253878&r1=253877&r2=253878&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/dead-vreg.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/dead-vreg.ll Mon Nov 23 10:50:18 2015
@@ -7,9 +7,7 @@ target triple = "wasm32-unknown-unknown"
define void @foo(i32* nocapture %a, i32 %w, i32 %h) {
; CHECK-LABEL: foo:
-; CHECK-NEXT: .param i32
-; CHECK-NEXT: .param i32
-; CHECK-NEXT: .param i32
+; CHECK-NEXT: .param i32, i32, i32
; CHECK-NEXT: .local i32, i32, i32, i32, i32, i32, i32, i32, i32{{$}}
entry:
%cmp.19 = icmp sgt i32 %h, 0
Modified: llvm/trunk/test/CodeGen/WebAssembly/f32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/f32.ll?rev=253878&r1=253877&r2=253878&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/f32.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/f32.ll Mon Nov 23 10:50:18 2015
@@ -15,8 +15,7 @@ declare float @llvm.nearbyint.f32(float)
declare float @llvm.rint.f32(float)
; CHECK-LABEL: fadd32:
-; CHECK-NEXT: .param f32{{$}}
-; CHECK-NEXT: .param f32{{$}}
+; CHECK-NEXT: .param f32, f32{{$}}
; CHECK-NEXT: .result f32{{$}}
; CHECK-NEXT: f32.add $push0, $0, $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
Modified: llvm/trunk/test/CodeGen/WebAssembly/f64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/f64.ll?rev=253878&r1=253877&r2=253878&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/f64.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/f64.ll Mon Nov 23 10:50:18 2015
@@ -15,8 +15,7 @@ declare double @llvm.nearbyint.f64(doubl
declare double @llvm.rint.f64(double)
; CHECK-LABEL: fadd64:
-; CHECK-NEXT: .param f64{{$}}
-; CHECK-NEXT: .param f64{{$}}
+; CHECK-NEXT: .param f64, f64{{$}}
; CHECK-NEXT: .result f64{{$}}
; CHECK-NEXT: f64.add $push0, $0, $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
Modified: llvm/trunk/test/CodeGen/WebAssembly/func.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/func.ll?rev=253878&r1=253877&r2=253878&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/func.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/func.ll Mon Nov 23 10:50:18 2015
@@ -22,8 +22,7 @@ define i32 @f1() {
}
; CHECK-LABEL: f2:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .param f32{{$}}
+; CHECK-NEXT: .param i32, f32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.const $push[[NUM:[0-9]+]], 0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
@@ -33,9 +32,8 @@ define i32 @f2(i32 %p1, float %p2) {
}
; CHECK-LABEL: f3:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .param f32{{$}}
-; CHECK-NOT: .local
+; CHECK-NEXT: .param i32, f32{{$}}
+; CHECK-NOT: local
; CHECK-NEXT: return{{$}}
; CHECK: .size f3,
define void @f3(i32 %p1, float %p2) {
@@ -45,7 +43,7 @@ define void @f3(i32 %p1, float %p2) {
; CHECK-LABEL: f4:
; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}}
-; CHECK-NEXT: .local
+; CHECK-NEXT: local
define i32 @f4(i32 %x) {
entry:
%c = trunc i32 %x to i1
Modified: llvm/trunk/test/CodeGen/WebAssembly/i32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/i32.ll?rev=253878&r1=253877&r2=253878&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/i32.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/i32.ll Mon Nov 23 10:50:18 2015
@@ -10,8 +10,7 @@ declare i32 @llvm.cttz.i32(i32, i1)
declare i32 @llvm.ctpop.i32(i32)
; CHECK-LABEL: add32:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.add $push0, $0, $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
@@ -21,8 +20,7 @@ define i32 @add32(i32 %x, i32 %y) {
}
; CHECK-LABEL: sub32:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.sub $push0, $0, $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
@@ -32,8 +30,7 @@ define i32 @sub32(i32 %x, i32 %y) {
}
; CHECK-LABEL: mul32:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.mul $push0, $0, $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
@@ -43,8 +40,7 @@ define i32 @mul32(i32 %x, i32 %y) {
}
; CHECK-LABEL: sdiv32:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.div_s $push0, $0, $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
@@ -54,8 +50,7 @@ define i32 @sdiv32(i32 %x, i32 %y) {
}
; CHECK-LABEL: udiv32:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.div_u $push0, $0, $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
@@ -65,8 +60,7 @@ define i32 @udiv32(i32 %x, i32 %y) {
}
; CHECK-LABEL: srem32:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.rem_s $push0, $0, $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
@@ -76,8 +70,7 @@ define i32 @srem32(i32 %x, i32 %y) {
}
; CHECK-LABEL: urem32:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.rem_u $push0, $0, $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
@@ -87,8 +80,7 @@ define i32 @urem32(i32 %x, i32 %y) {
}
; CHECK-LABEL: and32:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.and $push0, $0, $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
@@ -98,8 +90,7 @@ define i32 @and32(i32 %x, i32 %y) {
}
; CHECK-LABEL: or32:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.or $push0, $0, $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
@@ -109,8 +100,7 @@ define i32 @or32(i32 %x, i32 %y) {
}
; CHECK-LABEL: xor32:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.xor $push0, $0, $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
@@ -120,8 +110,7 @@ define i32 @xor32(i32 %x, i32 %y) {
}
; CHECK-LABEL: shl32:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.shl $push0, $0, $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
@@ -131,8 +120,7 @@ define i32 @shl32(i32 %x, i32 %y) {
}
; CHECK-LABEL: shr32:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.shr_u $push0, $0, $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
@@ -142,8 +130,7 @@ define i32 @shr32(i32 %x, i32 %y) {
}
; CHECK-LABEL: sar32:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.shr_s $push0, $0, $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
Modified: llvm/trunk/test/CodeGen/WebAssembly/i64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/i64.ll?rev=253878&r1=253877&r2=253878&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/i64.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/i64.ll Mon Nov 23 10:50:18 2015
@@ -10,8 +10,7 @@ declare i64 @llvm.cttz.i64(i64, i1)
declare i64 @llvm.ctpop.i64(i64)
; CHECK-LABEL: add64:
-; CHECK-NEXT: .param i64{{$}}
-; CHECK-NEXT: .param i64{{$}}
+; CHECK-NEXT: .param i64, i64{{$}}
; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: i64.add $push0, $0, $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
@@ -21,8 +20,7 @@ define i64 @add64(i64 %x, i64 %y) {
}
; CHECK-LABEL: sub64:
-; CHECK-NEXT: .param i64{{$}}
-; CHECK-NEXT: .param i64{{$}}
+; CHECK-NEXT: .param i64, i64{{$}}
; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: i64.sub $push0, $0, $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
@@ -32,8 +30,7 @@ define i64 @sub64(i64 %x, i64 %y) {
}
; CHECK-LABEL: mul64:
-; CHECK-NEXT: .param i64{{$}}
-; CHECK-NEXT: .param i64{{$}}
+; CHECK-NEXT: .param i64, i64{{$}}
; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: i64.mul $push0, $0, $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
@@ -43,8 +40,7 @@ define i64 @mul64(i64 %x, i64 %y) {
}
; CHECK-LABEL: sdiv64:
-; CHECK-NEXT: .param i64{{$}}
-; CHECK-NEXT: .param i64{{$}}
+; CHECK-NEXT: .param i64, i64{{$}}
; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: i64.div_s $push0, $0, $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
@@ -54,8 +50,7 @@ define i64 @sdiv64(i64 %x, i64 %y) {
}
; CHECK-LABEL: udiv64:
-; CHECK-NEXT: .param i64{{$}}
-; CHECK-NEXT: .param i64{{$}}
+; CHECK-NEXT: .param i64, i64{{$}}
; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: i64.div_u $push0, $0, $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
@@ -65,8 +60,7 @@ define i64 @udiv64(i64 %x, i64 %y) {
}
; CHECK-LABEL: srem64:
-; CHECK-NEXT: .param i64{{$}}
-; CHECK-NEXT: .param i64{{$}}
+; CHECK-NEXT: .param i64, i64{{$}}
; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: i64.rem_s $push0, $0, $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
@@ -76,8 +70,7 @@ define i64 @srem64(i64 %x, i64 %y) {
}
; CHECK-LABEL: urem64:
-; CHECK-NEXT: .param i64{{$}}
-; CHECK-NEXT: .param i64{{$}}
+; CHECK-NEXT: .param i64, i64{{$}}
; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: i64.rem_u $push0, $0, $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
@@ -87,8 +80,7 @@ define i64 @urem64(i64 %x, i64 %y) {
}
; CHECK-LABEL: and64:
-; CHECK-NEXT: .param i64{{$}}
-; CHECK-NEXT: .param i64{{$}}
+; CHECK-NEXT: .param i64, i64{{$}}
; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: i64.and $push0, $0, $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
@@ -98,8 +90,7 @@ define i64 @and64(i64 %x, i64 %y) {
}
; CHECK-LABEL: or64:
-; CHECK-NEXT: .param i64{{$}}
-; CHECK-NEXT: .param i64{{$}}
+; CHECK-NEXT: .param i64, i64{{$}}
; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: i64.or $push0, $0, $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
@@ -109,8 +100,7 @@ define i64 @or64(i64 %x, i64 %y) {
}
; CHECK-LABEL: xor64:
-; CHECK-NEXT: .param i64{{$}}
-; CHECK-NEXT: .param i64{{$}}
+; CHECK-NEXT: .param i64, i64{{$}}
; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: i64.xor $push0, $0, $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
@@ -120,8 +110,7 @@ define i64 @xor64(i64 %x, i64 %y) {
}
; CHECK-LABEL: shl64:
-; CHECK-NEXT: .param i64{{$}}
-; CHECK-NEXT: .param i64{{$}}
+; CHECK-NEXT: .param i64, i64{{$}}
; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: i64.shl $push0, $0, $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
@@ -131,8 +120,7 @@ define i64 @shl64(i64 %x, i64 %y) {
}
; CHECK-LABEL: shr64:
-; CHECK-NEXT: .param i64{{$}}
-; CHECK-NEXT: .param i64{{$}}
+; CHECK-NEXT: .param i64, i64{{$}}
; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: i64.shr_u $push0, $0, $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
@@ -142,8 +130,7 @@ define i64 @shr64(i64 %x, i64 %y) {
}
; CHECK-LABEL: sar64:
-; CHECK-NEXT: .param i64{{$}}
-; CHECK-NEXT: .param i64{{$}}
+; CHECK-NEXT: .param i64, i64{{$}}
; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: i64.shr_s $push0, $0, $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
Modified: llvm/trunk/test/CodeGen/WebAssembly/inline-asm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/inline-asm.ll?rev=253878&r1=253877&r2=253878&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/inline-asm.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/inline-asm.ll Mon Nov 23 10:50:18 2015
@@ -19,8 +19,7 @@ entry:
}
; CHECK-LABEL: bar:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: #APP{{$}}
; CHECK-NEXT: # $1 = bbb($0){{$}}
; CHECK-NEXT: #NO_APP{{$}}
Modified: llvm/trunk/test/CodeGen/WebAssembly/store.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/store.ll?rev=253878&r1=253877&r2=253878&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/store.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/store.ll Mon Nov 23 10:50:18 2015
@@ -6,8 +6,7 @@ target datalayout = "e-p:32:32-i64:64-n3
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: sti32:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: i32.store $0, $1{{$}}
; CHECK-NEXT: return{{$}}
define void @sti32(i32 *%p, i32 %v) {
@@ -16,8 +15,7 @@ define void @sti32(i32 *%p, i32 %v) {
}
; CHECK-LABEL: sti64:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .param i64{{$}}
+; CHECK-NEXT: .param i32, i64{{$}}
; CHECK-NEXT: i64.store $0, $1{{$}}
; CHECK-NEXT: return{{$}}
define void @sti64(i64 *%p, i64 %v) {
@@ -26,8 +24,7 @@ define void @sti64(i64 *%p, i64 %v) {
}
; CHECK-LABEL: stf32:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .param f32{{$}}
+; CHECK-NEXT: .param i32, f32{{$}}
; CHECK-NEXT: f32.store $0, $1{{$}}
; CHECK-NEXT: return{{$}}
define void @stf32(float *%p, float %v) {
@@ -36,8 +33,7 @@ define void @stf32(float *%p, float %v)
}
; CHECK-LABEL: stf64:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .param f64{{$}}
+; CHECK-NEXT: .param i32, f64{{$}}
; CHECK-NEXT: f64.store $0, $1{{$}}
; CHECK-NEXT: return{{$}}
define void @stf64(double *%p, double %v) {
Modified: llvm/trunk/test/CodeGen/WebAssembly/unused-argument.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/unused-argument.ll?rev=253878&r1=253877&r2=253878&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/unused-argument.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/unused-argument.ll Mon Nov 23 10:50:18 2015
@@ -6,8 +6,7 @@ target datalayout = "e-p:32:32-i64:64-n3
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: unused_first:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: return $1{{$}}
define i32 @unused_first(i32 %x, i32 %y) {
@@ -15,8 +14,7 @@ define i32 @unused_first(i32 %x, i32 %y)
}
; CHECK-LABEL: unused_second:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: return $0{{$}}
define i32 @unused_second(i32 %x, i32 %y) {
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