[PATCH] D14761: [X86][SSE] Detect AVG pattern during instruction combine for SSE2/AVX2/AVX512BW.

[Simon Pilgrim via llvm-commits]

RKSimon added a comment.

Couple of minor comments.


================
Comment at: lib/Target/X86/X86ISelLowering.cpp:25286
@@ +25285,3 @@
+         VT.getVectorElementType() == MVT::i16) &&
+        InVT.getVectorElementType() == MVT::i32 && isPowerOf2_32(NumElems)))
+    return SDValue();
----------------
Do the extended vector element types have to be i32? I understood it as it could be anything that was greater in width than the source.

AMD APM v4 description for PAVGB:

> An average is computed by adding pairs of operands, adding 1 to a 9-bit temporary sum, and rightshifting the temporary sum by one bit position.





================
Comment at: lib/Target/X86/X86ISelLowering.cpp:25309
@@ +25308,3 @@
+  //
+  // In AVX512, the last instruction can also be a trunc store.
+
----------------
If this is supposed to be FIXME comment please mark it as such.

================
Comment at: lib/Target/X86/X86ISelLowering.cpp:25321
@@ +25320,3 @@
+    auto NumOperands = V.getNumOperands();
+    for (unsigned i = 0; i < NumOperands; i++) {
+      ConstantSDNode *C = dyn_cast<ConstantSDNode>(V.getOperand(i));
----------------
Standard Style:

for (unsigned i = 0, e = V.getNumOperands(); i != NumOperands; ++i)


http://reviews.llvm.org/D14761