[PATCH] D14496: X86: More efficient codegen for 64-bit compares on 32-bit target

Hans Wennborg via llvm-commits llvm-commits at lists.llvm.org
Wed Nov 18 09:34:04 PST 2015


hans marked an inline comment as done.

================
Comment at: lib/Target/X86/X86ISelLowering.cpp:14595
@@ +14594,3 @@
+  switch (cast<CondCodeSDNode>(Cond)->get()) {
+  // This operation can only detect < and >=.
+  case ISD::SETLT:  CC = X86::COND_L; break;
----------------
DavidKreitzer wrote:
> I would recommend against this restriction. The SETCCE operation itself makes perfect sense for other conditions. (For example, SETCCE "eq" computes op0 - op1 - carry == 0.) For the purposes of large integer compare lowering, it happens to only be useful for < and >=, but we might find other good uses for it. (I'm imagining some fancy DAG combine optimizations ...)
> 
Sounds good to me.


http://reviews.llvm.org/D14496





More information about the llvm-commits mailing list