[PATCH] D11798: [mips][microMIPS] Implement BOVC, BNVC, EXT, INS and JALRC instructions

Hrvoje Varga via llvm-commits llvm-commits at lists.llvm.org
Tue Nov 17 23:00:00 PST 2015


hvarga updated this revision to Diff 40473.
hvarga added a comment.
Herald added a subscriber: dsanders.

Removed the PREFE and NAL from review name. PREFE is already implemented and available in codebase. NAL instruction is not required in microMIPS since revision 6.01.
Instructions BOVC and BNVC are now fully implemented.


http://reviews.llvm.org/D11798

Files:
  lib/Target/Mips/Disassembler/MipsDisassembler.cpp
  lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
  lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.h
  lib/Target/Mips/MicroMips32r6InstrFormats.td
  lib/Target/Mips/MicroMips32r6InstrInfo.td
  lib/Target/Mips/MicroMipsInstrInfo.td
  lib/Target/Mips/Mips32r6InstrInfo.td
  lib/Target/Mips/MipsInstrInfo.td
  test/MC/Disassembler/Mips/micromips32r6/valid.txt
  test/MC/Mips/micromips32r6/valid.s

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