[PATCH] D14713: [ELF2] - Optimization for R_X86_64_GOTTPOFF relocation.

[Rui Ueyama via llvm-commits]

ruiu added inline comments.

================
Comment at: ELF/Target.cpp:367
@@ +366,3 @@
+// Opcodes info can be found at http://ref.x86asm.net/coder64.html#x48.
+void X86_64TargetInfo::relocateTlsOptimize(uint8_t *Loc, uint8_t *BufEnd,
+                                           uint32_t Type, uint64_t P,
----------------
Add BufStart and check for the bound.

================
Comment at: ELF/Target.cpp:370-374
@@ +369,7 @@
+                                           uint64_t SA) const {
+  uint8_t *Prefix = &Loc[-3];
+  uint8_t *Instruct = &Loc[-2];
+  uint8_t *RegSlot = &Loc[-1];
+  uint8_t Reg = (Loc[-1]) >> 3;
+  bool IsMovOp = *Instruct == 0x8b;
+  if (*Prefix == 0x4c)
----------------
Instruct -> Inst
IsMovOp -> IsMov

================
Comment at: ELF/Target.cpp:375-378
@@ +374,6 @@
+  bool IsMovOp = *Instruct == 0x8b;
+  if (*Prefix == 0x4c)
+    *Prefix = IsMovOp ? 0x49 : 0x4D;
+  *Instruct = IsMovOp ? 0xc7 : 0x8d;
+  *RegSlot = IsMovOp ? (0xc0 | Reg) : (0x80 | Reg | (Reg << 3));
+  relocateOne(Loc, BufEnd, R_X86_64_TPOFF32, P, SA);
----------------
Does this handle SP register?

================
Comment at: ELF/Target.cpp:379
@@ +378,3 @@
+  *RegSlot = IsMovOp ? (0xc0 | Reg) : (0x80 | Reg | (Reg << 3));
+  relocateOne(Loc, BufEnd, R_X86_64_TPOFF32, P, SA);
+}
----------------
I think the original code was better

  write32le(Loc, SA - Out<ELF64LE>::TlsPhdr->p_memsz);


http://reviews.llvm.org/D14713