[PATCH] D14743: [ARM] Don't pessimize i32 vselect.
Charlie Turner via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 17 09:28:05 PST 2015
This revision was automatically updated to reflect the committed changes.
Closed by commit rL253349: [ARM] Don't pessimize i32 vselect. (authored by chatur01).
Changed prior to commit:
http://reviews.llvm.org/D14743?vs=40292&id=40403#toc
Repository:
rL LLVM
http://reviews.llvm.org/D14743
Files:
llvm/trunk/lib/Target/ARM/ARMTargetTransformInfo.cpp
llvm/trunk/test/Analysis/CostModel/ARM/select.ll
llvm/trunk/test/CodeGen/ARM/vselect_imax.ll
Index: llvm/trunk/test/CodeGen/ARM/vselect_imax.ll
===================================================================
--- llvm/trunk/test/CodeGen/ARM/vselect_imax.ll
+++ llvm/trunk/test/CodeGen/ARM/vselect_imax.ll
@@ -10,8 +10,6 @@
ret void
}
-; We adjusted the cost model of the following selects. When we improve code
-; lowering we also need to adjust the cost.
%T0_10 = type <16 x i16>
%T1_10 = type <16 x i1>
; CHECK-LABEL: func_blend10:
@@ -23,7 +21,7 @@
; CHECK: vmin.s16
; CHECK: vmin.s16
; COST: func_blend10
-; COST: cost of 40 {{.*}} select
+; COST: cost of 2 {{.*}} select
%r = select %T1_10 %c, %T0_10 %v0, %T0_10 %v1
store %T0_10 %r, %T0_10* %storeaddr
ret void
@@ -39,7 +37,7 @@
; CHECK: vmin.s32
; CHECK: vmin.s32
; COST: func_blend14
-; COST: cost of 41 {{.*}} select
+; COST: cost of 2 {{.*}} select
%r = select %T1_14 %c, %T0_14 %v0, %T0_14 %v1
store %T0_14 %r, %T0_14* %storeaddr
ret void
@@ -55,11 +53,14 @@
%v1 = load %T0_15, %T0_15* %loadaddr2
%c = icmp slt %T0_15 %v0, %v1
; COST: func_blend15
-; COST: cost of 82 {{.*}} select
+; COST: cost of 4 {{.*}} select
%r = select %T1_15 %c, %T0_15 %v0, %T0_15 %v1
store %T0_15 %r, %T0_15* %storeaddr
ret void
}
+
+; We adjusted the cost model of the following selects. When we improve code
+; lowering we also need to adjust the cost.
%T0_18 = type <4 x i64>
%T1_18 = type <4 x i1>
; CHECK-LABEL: func_blend18:
Index: llvm/trunk/test/Analysis/CostModel/ARM/select.ll
===================================================================
--- llvm/trunk/test/Analysis/CostModel/ARM/select.ll
+++ llvm/trunk/test/Analysis/CostModel/ARM/select.ll
@@ -34,16 +34,16 @@
%v12 = select <4 x i1> undef, <4 x i16> undef, <4 x i16> undef
; CHECK: cost of 1 {{.*}} select
%v13 = select <8 x i1> undef, <8 x i16> undef, <8 x i16> undef
- ; CHECK: cost of 40 {{.*}} select
+ ; CHECK: cost of 2 {{.*}} select
%v13b = select <16 x i1> undef, <16 x i16> undef, <16 x i16> undef
; CHECK: cost of 1 {{.*}} select
%v14 = select <2 x i1> undef, <2 x i32> undef, <2 x i32> undef
; CHECK: cost of 1 {{.*}} select
%v15 = select <4 x i1> undef, <4 x i32> undef, <4 x i32> undef
- ; CHECK: cost of 41 {{.*}} select
+ ; CHECK: cost of 2 {{.*}} select
%v15b = select <8 x i1> undef, <8 x i32> undef, <8 x i32> undef
- ; CHECK: cost of 82 {{.*}} select
+ ; CHECK: cost of 4 {{.*}} select
%v15c = select <16 x i1> undef, <16 x i32> undef, <16 x i32> undef
; CHECK: cost of 1 {{.*}} select
Index: llvm/trunk/lib/Target/ARM/ARMTargetTransformInfo.cpp
===================================================================
--- llvm/trunk/lib/Target/ARM/ARMTargetTransformInfo.cpp
+++ llvm/trunk/lib/Target/ARM/ARMTargetTransformInfo.cpp
@@ -274,9 +274,6 @@
if (ST->hasNEON() && ValTy->isVectorTy() && ISD == ISD::SELECT) {
// Lowering of some vector selects is currently far from perfect.
static const TypeConversionCostTblEntry NEONVectorSelectTbl[] = {
- { ISD::SELECT, MVT::v16i1, MVT::v16i16, 2*16 + 1 + 3*1 + 4*1 },
- { ISD::SELECT, MVT::v8i1, MVT::v8i32, 4*8 + 1*3 + 1*4 + 1*2 },
- { ISD::SELECT, MVT::v16i1, MVT::v16i32, 4*16 + 1*6 + 1*8 + 1*4 },
{ ISD::SELECT, MVT::v4i1, MVT::v4i64, 4*4 + 1*2 + 1 },
{ ISD::SELECT, MVT::v8i1, MVT::v8i64, 50 },
{ ISD::SELECT, MVT::v16i1, MVT::v16i64, 100 }
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