[llvm] r253148 - [WebAssembly] Support signext, zeroext, and several other function attributes.

Dan Gohman via llvm-commits llvm-commits at lists.llvm.org
Sat Nov 14 15:15:41 PST 2015 

Author: djg
Date: Sat Nov 14 17:15:41 2015
New Revision: 253148

URL: http://llvm.org/viewvc/llvm-project?rev=253148&view=rev
Log:
[WebAssembly] Support signext, zeroext, and several other function attributes.

Added:
    llvm/trunk/test/CodeGen/WebAssembly/signext-zeroext.ll
Modified:
    llvm/trunk/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp

Modified: llvm/trunk/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp?rev=253148&r1=253147&r2=253148&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp Sat Nov 14 17:15:41 2015
@@ -309,8 +309,6 @@ WebAssemblyTargetLowering::LowerCall(Cal
     Chain = Res.getValue(1);
   }
 
-  // FIXME: handle CLI.RetSExt and CLI.RetZExt?
-
   Chain = DAG.getCALLSEQ_END(Chain, NB, Zero, SDValue(), DL);
 
   return Chain;
@@ -342,22 +340,12 @@ SDValue WebAssemblyTargetLowering::Lower
 
   // Record the number and types of the return values.
   for (const ISD::OutputArg &Out : Outs) {
-    if (Out.Flags.isZExt())
-      fail(DL, DAG, "WebAssembly hasn't implemented zext results");
-    if (Out.Flags.isSExt())
-      fail(DL, DAG, "WebAssembly hasn't implemented sext results");
-    if (Out.Flags.isInReg())
-      fail(DL, DAG, "WebAssembly hasn't implemented inreg results");
-    if (Out.Flags.isSRet())
-      fail(DL, DAG, "WebAssembly hasn't implemented sret results");
     if (Out.Flags.isByVal())
       fail(DL, DAG, "WebAssembly hasn't implemented byval results");
     if (Out.Flags.isInAlloca())
       fail(DL, DAG, "WebAssembly hasn't implemented inalloca results");
     if (Out.Flags.isNest())
       fail(DL, DAG, "WebAssembly hasn't implemented nest results");
-    if (Out.Flags.isReturned())
-      fail(DL, DAG, "WebAssembly hasn't implemented returned results");
     if (Out.Flags.isInConsecutiveRegs())
       fail(DL, DAG, "WebAssembly hasn't implemented cons regs results");
     if (Out.Flags.isInConsecutiveRegsLast())
@@ -383,22 +371,12 @@ SDValue WebAssemblyTargetLowering::Lower
 
   unsigned ArgNo = 0;
   for (const ISD::InputArg &In : Ins) {
-    if (In.Flags.isZExt())
-      fail(DL, DAG, "WebAssembly hasn't implemented zext arguments");
-    if (In.Flags.isSExt())
-      fail(DL, DAG, "WebAssembly hasn't implemented sext arguments");
-    if (In.Flags.isInReg())
-      fail(DL, DAG, "WebAssembly hasn't implemented inreg arguments");
-    if (In.Flags.isSRet())
-      fail(DL, DAG, "WebAssembly hasn't implemented sret arguments");
     if (In.Flags.isByVal())
       fail(DL, DAG, "WebAssembly hasn't implemented byval arguments");
     if (In.Flags.isInAlloca())
       fail(DL, DAG, "WebAssembly hasn't implemented inalloca arguments");
     if (In.Flags.isNest())
       fail(DL, DAG, "WebAssembly hasn't implemented nest arguments");
-    if (In.Flags.isReturned())
-      fail(DL, DAG, "WebAssembly hasn't implemented returned arguments");
     if (In.Flags.isInConsecutiveRegs())
       fail(DL, DAG, "WebAssembly hasn't implemented cons regs arguments");
     if (In.Flags.isInConsecutiveRegsLast())

Added: llvm/trunk/test/CodeGen/WebAssembly/signext-zeroext.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/signext-zeroext.ll?rev=253148&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/signext-zeroext.ll (added)
+++ llvm/trunk/test/CodeGen/WebAssembly/signext-zeroext.ll Sat Nov 14 17:15:41 2015
@@ -0,0 +1,76 @@
+; RUN: llc < %s -asm-verbose=false | FileCheck %s
+
+; Test zeroext and signext ABI keywords
+
+target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target triple = "wasm32-unknown-unknown"
+
+; CHECK-LABEL: z2s_func:
+; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .local i32, i32, i32, i32{{$}}
+; CHECK-NEXT: i32.const $push, 24{{$}}
+; CHECK-NEXT: set_local 1, $pop{{$}}
+; CHECK-NEXT: i32.shl $push, (get_local 0), (get_local 1){{$}}
+; CHECK-NEXT: set_local 2, $pop{{$}}
+; CHECK-NEXT: i32.shr_s $push, (get_local 2), (get_local 1){{$}}
+; CHECK-NEXT: set_local 3, $pop{{$}}
+; CHECK-NEXT: return (get_local 3){{$}}
+define signext i8 @z2s_func(i8 zeroext %t) {
+  ret i8 %t
+}
+
+; CHECK-LABEL: s2z_func:
+; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .local i32, i32, i32{{$}}
+; CHECK-NEXT: i32.const $push, 255{{$}}
+; CHECK-NEXT: set_local 1, $pop{{$}}
+; CHECK-NEXT: i32.and $push, (get_local 0), (get_local 1){{$}}
+; CHECK-NEXT: set_local 2, $pop{{$}}
+; CHECK-NEXT: return (get_local 2){{$}}
+define zeroext i8 @s2z_func(i8 signext %t) {
+  ret i8 %t
+}
+
+; CHECK-LABEL: z2s_call:
+; CHECK-NEXT: .param i32
+; CHECK-NEXT: .result i32
+; CHECK-NEXT: .local i32, i32, i32, i32
+; CHECK-NEXT: i32.const $push, 255
+; CHECK-NEXT: set_local 1, $pop
+; CHECK-NEXT: i32.and $push, (get_local 0), (get_local 1)
+; CHECK-NEXT: set_local 2, $pop
+; CHECK-NEXT: call z2s_func, $push, (get_local 2)
+; CHECK-NEXT: set_local 3, $pop
+; CHECK-NEXT: return (get_local 3)
+define i32 @z2s_call(i32 %t) {
+  %s = trunc i32 %t to i8
+  %u = call signext i8 @z2s_func(i8 zeroext %s)
+  %v = sext i8 %u to i32
+  ret i32 %v
+}
+
+; CHECK-LABEL: s2z_call:
+; CHECK-NEXT: .param i32
+; CHECK-NEXT: .result i32
+; CHECK-NEXT: .local i32, i32, i32, i32, i32, i32, i32
+; CHECK-NEXT: i32.const $push, 24
+; CHECK-NEXT: set_local 1, $pop
+; CHECK-NEXT: i32.shl $push, (get_local 0), (get_local 1)
+; CHECK-NEXT: set_local 2, $pop
+; CHECK-NEXT: i32.shr_s $push, (get_local 2), (get_local 1)
+; CHECK-NEXT: set_local 3, $pop
+; CHECK-NEXT: call s2z_func, $push, (get_local 3)
+; CHECK-NEXT: set_local 4, $pop
+; CHECK-NEXT: i32.shl $push, (get_local 4), (get_local 1)
+; CHECK-NEXT: set_local 5, $pop
+; CHECK-NEXT: i32.shr_s $push, (get_local 5), (get_local 1)
+; CHECK-NEXT: set_local 6, $pop
+; CHECK-NEXT: return (get_local 6)
+define i32 @s2z_call(i32 %t) {
+  %s = trunc i32 %t to i8
+  %u = call zeroext i8 @s2z_func(i8 signext %s)
+  %v = sext i8 %u to i32
+  ret i32 %v
+}

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