[PATCH] D14444: ELFYAML: Add support for parsing AMDGPU section attribute flags

[Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL253052: ELFYAML: Add support for parsing AMDGPU section attribute flags (authored by tstellar).

Changed prior to commit:
  http://reviews.llvm.org/D14444?vs=39532&id=40159#toc

Repository:
  rL LLVM

http://reviews.llvm.org/D14444

Files:
  llvm/trunk/lib/Object/ELFYAML.cpp
  llvm/trunk/test/Object/AMDGPU/elf-definitios.yaml

Index: llvm/trunk/test/Object/AMDGPU/elf-definitios.yaml
===================================================================
--- llvm/trunk/test/Object/AMDGPU/elf-definitios.yaml
+++ llvm/trunk/test/Object/AMDGPU/elf-definitios.yaml
@@ -1,12 +1,27 @@
 # RUN: yaml2obj -format=elf %s > %t.o
-# RUN: llvm-readobj -file-headers %t.o | FileCheck %s
+# RUN: llvm-readobj -s -file-headers %t.o | FileCheck %s
 
 # CHECK:  Machine: EM_AMDGPU (0xE0)
+# CHECK: Sections [
+# CHECK: Section {
+# CHECK: Name: .shf_amdgpu
+# CHECK: Flags [ (0xF00000)
+# CHECK: SHF_AMDGPU_HSA_AGENT (0x800000)
+# CHECK: SHF_AMDGPU_HSA_CODE (0x400000)
+# CHECK: SHF_AMDGPU_HSA_GLOBAL (0x100000)
+# CHECK: SHF_AMDGPU_HSA_READONLY (0x200000)
+# CHECK: }
 
 ---
 FileHeader:
   Class:   ELFCLASS64
   Data:    ELFDATA2LSB
   Type:    ET_REL
   Machine: EM_AMDGPU
+
+Sections:
+  - Name:  .shf_amdgpu
+    Type:  SHT_PROGBITS
+    Flags: [ SHF_AMDGPU_HSA_GLOBAL, SHF_AMDGPU_HSA_READONLY,
+             SHF_AMDGPU_HSA_CODE, SHF_AMDGPU_HSA_AGENT]
 ...
Index: llvm/trunk/lib/Object/ELFYAML.cpp
===================================================================
--- llvm/trunk/lib/Object/ELFYAML.cpp
+++ llvm/trunk/lib/Object/ELFYAML.cpp
@@ -402,6 +402,7 @@
 
 void ScalarBitSetTraits<ELFYAML::ELF_SHF>::bitset(IO &IO,
                                                   ELFYAML::ELF_SHF &Value) {
+  const auto *Object = static_cast<ELFYAML::Object *>(IO.getContext());
 #define BCase(X) IO.bitSetCase(Value, #X, ELF::X);
   BCase(SHF_WRITE)
   BCase(SHF_ALLOC)
@@ -414,6 +415,17 @@
   BCase(SHF_OS_NONCONFORMING)
   BCase(SHF_GROUP)
   BCase(SHF_TLS)
+  switch(Object->Header.Machine) {
+  case ELF::EM_AMDGPU:
+    BCase(SHF_AMDGPU_HSA_GLOBAL)
+    BCase(SHF_AMDGPU_HSA_READONLY)
+    BCase(SHF_AMDGPU_HSA_CODE)
+    BCase(SHF_AMDGPU_HSA_AGENT)
+    break;
+  default:
+    // Nothing to do.
+    break;
+  }
 #undef BCase
 }
 


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