[PATCH] D14651: [AArch64] ldr= pseudo-instruction silently ignored if register invalid

Oliver Stannard via llvm-commits llvm-commits at lists.llvm.org
Fri Nov 13 05:07:42 PST 2015


olista01 created this revision.
olista01 added a subscriber: llvm-commits.
olista01 set the repository for this revision to rL LLVM.
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The AArch64 assembler was silently ignoring instructions like this:
    ldr foo, =bar

AArch64AsmParser::parseOperand was returning true as the parse failed, but was not calling AArch64AsmParser::Error to report this to the user, so the instruction was ignored without printing an error message.

Repository:
  rL LLVM

http://reviews.llvm.org/D14651

Files:
  lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
  test/MC/AArch64/ldr-pseudo-diagnostics.s

Index: test/MC/AArch64/ldr-pseudo-diagnostics.s
===================================================================
--- test/MC/AArch64/ldr-pseudo-diagnostics.s
+++ test/MC/AArch64/ldr-pseudo-diagnostics.s
@@ -12,3 +12,21 @@
 // CHECK-ERROR: error: Immediate too large for register
 // CHECK-ERROR:  ldr w0, =-0x80000001
 // CHECK-ERROR:          ^
+
+f3:
+  ldr foo, =1
+// CHECK-ERROR: error: Only valid when first operand is register
+// CHECK-ERROR:   ldr foo, =1
+// CHECK-ERROR:            ^
+
+f4:
+  add r0, r0, =1
+// CHECK-ERROR: error: unexpected token in operand
+// CHECK-ERROR:   add r0, r0, =1
+// CHECK-ERROR:               ^
+
+f5:
+  ldr x0, =())
+// CHECK-ERROR: error: unknown token in expression
+// CHECK-ERROR:   ldr x0, =())
+// CHECK-ERROR:             ^
Index: lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
===================================================================
--- lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+++ lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
@@ -3178,7 +3178,7 @@
 
     if (Operands.size() < 2 ||
         !static_cast<AArch64Operand &>(*Operands[1]).isReg())
-      return true;
+      return Error(Loc, "Only valid when first operand is register");
 
     bool IsXReg =
         AArch64MCRegisterClasses[AArch64::GPR64allRegClassID].contains(


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