[llvm] r252987 - [WebAssembly] Rename BR_IF_ to BR_IF

[Dan Gohman via llvm-commits]

Author: djg
Date: Thu Nov 12 18:46:31 2015
New Revision: 252987

URL: http://llvm.org/viewvc/llvm-project?rev=252987&view=rev
Log:
[WebAssembly] Rename BR_IF_ to BR_IF

With MC-based instruction printing, we no longer need instruction names to
mangle in hints about how they should be printed.

Modified:
    llvm/trunk/lib/Target/WebAssembly/WebAssemblyISD.def
    llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrControl.td
    llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp

Modified: llvm/trunk/lib/Target/WebAssembly/WebAssemblyISD.def
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/WebAssemblyISD.def?rev=252987&r1=252986&r2=252987&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/WebAssemblyISD.def (original)
+++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyISD.def Thu Nov 12 18:46:31 2015
@@ -19,7 +19,7 @@ HANDLE_NODETYPE(CALL0)
 HANDLE_NODETYPE(RETURN)
 HANDLE_NODETYPE(ARGUMENT)
 HANDLE_NODETYPE(Wrapper)
-HANDLE_NODETYPE(BR_IF_)
+HANDLE_NODETYPE(BR_IF)
 HANDLE_NODETYPE(SWITCH)
 
 // add memory opcodes starting at ISD::FIRST_TARGET_MEMORY_OPCODE here...

Modified: llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrControl.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrControl.td?rev=252987&r1=252986&r2=252987&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrControl.td (original)
+++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrControl.td Thu Nov 12 18:46:31 2015
@@ -13,9 +13,9 @@
 //===----------------------------------------------------------------------===//
 
 let isBranch = 1, isTerminator = 1, hasCtrlDep = 1 in {
-def BR_IF_ : I<(outs), (ins bb_op:$dst, I32:$a),
-               [(brcond I32:$a, bb:$dst)],
-               "br_if $dst, $a">;
+def BR_IF : I<(outs), (ins bb_op:$dst, I32:$a),
+              [(brcond I32:$a, bb:$dst)],
+              "br_if $dst, $a">;
 let isBarrier = 1 in {
 def BR   : I<(outs), (ins bb_op:$dst),
              [(br bb:$dst)],

Modified: llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp?rev=252987&r1=252986&r2=252987&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp Thu Nov 12 18:46:31 2015
@@ -51,7 +51,7 @@ bool WebAssemblyInstrInfo::AnalyzeBranch
     default:
       // Unhandled instruction; bail out.
       return true;
-    case WebAssembly::BR_IF_:
+    case WebAssembly::BR_IF:
       if (HaveCond)
         return true;
       Cond.push_back(MI.getOperand(1));
@@ -104,7 +104,7 @@ unsigned WebAssemblyInstrInfo::InsertBra
     return 1;
   }
 
-  BuildMI(&MBB, DL, get(WebAssembly::BR_IF_))
+  BuildMI(&MBB, DL, get(WebAssembly::BR_IF))
       .addMBB(TBB)
       .addOperand(Cond[0]);
   if (!FBB)