[PATCH] D14217: [x86] translating "fp" (floating point) instructions from {fadd, fdiv, fmul, fsub, fsubr, fdivr} to {faddp, fdivp, fmulp, fsubp, fsubrp, fdivrp}

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This revision was automatically updated to reflect the committed changes.
Closed by commit rL252908: [x86] translating "fp" (floating point) instructions from {fadd,fdiv,fmul… (authored by mzuckerm).

Changed prior to commit:
  http://reviews.llvm.org/D14217?vs=39036&id=40059#toc

Repository:
  rL LLVM

http://reviews.llvm.org/D14217

Files:
  llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp
  llvm/trunk/lib/Target/X86/X86InstrInfo.td
  llvm/trunk/test/MC/X86/intel-syntax-2.s
  llvm/trunk/test/MC/X86/intel-syntax.s

Index: llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp
===================================================================
--- llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -2218,6 +2218,20 @@
       (isPrefix && getLexer().is(AsmToken::Slash)))
     Parser.Lex();
 
+  // This is for gas compatibility and cannot be done in td.
+  // Adding "p" for some floating point with no argument.
+  // For example: fsub --> fsubp
+  bool IsFp =
+    Name == "fsub" || Name == "fdiv" || Name == "fsubr" || Name == "fdivr";
+  if (IsFp && Operands.size() == 1) {
+    const char *Repl = StringSwitch<const char *>(Name)
+      .Case("fsub", "fsubp")
+      .Case("fdiv", "fdivp")
+      .Case("fsubr", "fsubrp")
+      .Case("fdivr", "fdivrp");
+    static_cast<X86Operand &>(*Operands[0]).setTokenValue(Repl);
+  }
+
   // This is a terrible hack to handle "out[bwl]? %al, (%dx)" ->
   // "outb %al, %dx".  Out doesn't take a memory form, but this is a widely
   // documented form in various unofficial manuals, so a lot of code uses it.
Index: llvm/trunk/lib/Target/X86/X86InstrInfo.td
===================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.td
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.td
@@ -2793,8 +2793,10 @@
 // Various unary fpstack operations default to operating on on ST1.
 // For example, "fxch" -> "fxch %st(1)"
 def : InstAlias<"faddp",        (ADD_FPrST0  ST1), 0>;
+def:  InstAlias<"fadd",         (ADD_FPrST0  ST1), 0>;
 def : InstAlias<"fsub{|r}p",    (SUBR_FPrST0 ST1), 0>;
 def : InstAlias<"fsub{r|}p",    (SUB_FPrST0  ST1), 0>;
+def : InstAlias<"fmul",         (MUL_FPrST0  ST1), 0>;
 def : InstAlias<"fmulp",        (MUL_FPrST0  ST1), 0>;
 def : InstAlias<"fdiv{|r}p",    (DIVR_FPrST0 ST1), 0>;
 def : InstAlias<"fdiv{r|}p",    (DIV_FPrST0  ST1), 0>;
Index: llvm/trunk/test/MC/X86/intel-syntax.s
===================================================================
--- llvm/trunk/test/MC/X86/intel-syntax.s
+++ llvm/trunk/test/MC/X86/intel-syntax.s
@@ -533,6 +533,20 @@
 fdivp ST(1)
 fdivrp ST(1)
 
+
+// CHECK: faddp %st(1)
+// CHECK: fmulp %st(1)
+// CHECK: fsubrp %st(1)
+// CHECK: fsubp %st(1)
+// CHECK: fdivrp %st(1)
+// CHECK: fdivp %st(1)
+fadd 
+fmul
+fsub
+fsubr
+fdiv
+fdivr
+
 // CHECK: faddp %st(1)
 // CHECK: fmulp %st(1)
 // CHECK: fsubrp %st(1)
Index: llvm/trunk/test/MC/X86/intel-syntax-2.s
===================================================================
--- llvm/trunk/test/MC/X86/intel-syntax-2.s
+++ llvm/trunk/test/MC/X86/intel-syntax-2.s
@@ -15,3 +15,17 @@
 .att_syntax prefix
 	movl $255, -4(%rsp)
 // CHECK:	movl	$255, -4(%rsp)
+
+_test3:
+fadd 
+// CHECK: faddp %st(1)
+fmul
+// CHECK: fmulp %st(1)
+fsub
+// CHECK: fsubp %st(1)
+fsubr
+// CHECK: fsubrp %st(1)
+fdiv
+// CHECK: fdivp %st(1)
+fdivr
+// CHECK: fdivrp %st(1)


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