[PATCH] D14514: [AArch64]Merge narrow zero stores to wider single store

[Tim Northover via llvm-commits]

t.p.northover added a subscriber: t.p.northover.

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Comment at: lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp:706-707
@@ +705,4 @@
+    // Change the scaled offset from small to large type.
+    if (!IsUnscaled)
+      OffsetImm /= 2;
+    MIB = BuildMI(*I->getParent(), InsertionPoint, I->getDebugLoc(),
----------------
What happens here for sequences like

    strb wzr, [x0, #1]
    strb wzr, [x0, #2]

? It looks like you might try to produce "strh wzr, [x0, #1]" (using STRHHui) which is invalid. This also applies to the code recently added around line 537.


http://reviews.llvm.org/D14514