[llvm] r252462 - [EABI] Add LLVM support for -meabi flag
Renato Golin via llvm-commits
llvm-commits at lists.llvm.org
Mon Nov 9 04:40:31 PST 2015
Author: rengolin
Date: Mon Nov 9 06:40:30 2015
New Revision: 252462
URL: http://llvm.org/viewvc/llvm-project?rev=252462&view=rev
Log:
[EABI] Add LLVM support for -meabi flag
"GCC requires the freestanding environment provide memcpy, memmove, memset
and memcmp": https://gcc.gnu.org/onlinedocs/gcc-5.2.0/gcc/Standards.html
Hence in GNUEABI targets LLVM should not convert 'memops' to their equivalent
'__aeabi_memops'. This convertion violates GCC contract.
The -meabi flag controls whether or not LLVM will modify 'memops' in GNUEABI
targets.
Without -meabi: use the triple default EABI.
With -meabi=default: use the triple default EABI.
With -meabi=gnu: use 'memops'.
With -meabi=4 or -meabi=5: use '__aeabi_memops'.
With -meabi set to an unknown value: same as -meabi=default.
Patch by Vinicius Tinti.
Added:
llvm/trunk/test/CodeGen/ARM/arm-eabi.ll
Modified:
llvm/trunk/docs/CommandGuide/llc.rst
llvm/trunk/include/llvm/CodeGen/CommandFlags.h
llvm/trunk/include/llvm/Target/TargetOptions.h
llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
llvm/trunk/lib/Target/ARM/ARMSubtarget.h
llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp
llvm/trunk/test/CodeGen/ARM/memfunc.ll
Modified: llvm/trunk/docs/CommandGuide/llc.rst
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CommandGuide/llc.rst?rev=252462&r1=252461&r2=252462&view=diff
==============================================================================
--- llvm/trunk/docs/CommandGuide/llc.rst (original)
+++ llvm/trunk/docs/CommandGuide/llc.rst Mon Nov 9 06:40:30 2015
@@ -127,6 +127,12 @@ End-user Options
implements an LLVM target. This will permit the target name to be used with
the :option:`-march` option so that code can be generated for that target.
+.. option:: -meabi=[default|gnu|4|5]
+
+ Specify which EABI version should conform to. Valid EABI versions are *gnu*,
+ *4* and *5*. Default value (*default*) depends on the triple.
+
+
Tuning/Configuration Options
~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Modified: llvm/trunk/include/llvm/CodeGen/CommandFlags.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/CommandFlags.h?rev=252462&r1=252461&r2=252462&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/CommandFlags.h (original)
+++ llvm/trunk/include/llvm/CodeGen/CommandFlags.h Mon Nov 9 06:40:30 2015
@@ -247,6 +247,15 @@ JTableType("jump-table-type",
"Create one table per unique function type."),
clEnumValEnd));
+cl::opt<llvm::EABI> EABIVersion(
+ "meabi", cl::desc("Set EABI type (default depends on triple):"),
+ cl::init(EABI::Default),
+ cl::values(clEnumValN(EABI::Default, "default",
+ "Triple default EABI version"),
+ clEnumValN(EABI::EABI4, "4", "EABI version 4"),
+ clEnumValN(EABI::EABI5, "5", "EABI version 5"),
+ clEnumValN(EABI::GNU, "gnu", "EABI GNU"), clEnumValEnd));
+
// Common utility function tightly tied to the options listed here. Initializes
// a TargetOptions object with CodeGen flags and returns it.
static inline TargetOptions InitTargetOptionsFromCodeGenFlags() {
@@ -275,6 +284,7 @@ static inline TargetOptions InitTargetOp
Options.JTType = JTableType;
Options.ThreadModel = TMModel;
+ Options.EABIVersion = EABIVersion;
return Options;
}
Modified: llvm/trunk/include/llvm/Target/TargetOptions.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetOptions.h?rev=252462&r1=252461&r2=252462&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/TargetOptions.h (original)
+++ llvm/trunk/include/llvm/Target/TargetOptions.h Mon Nov 9 06:40:30 2015
@@ -58,24 +58,29 @@ namespace llvm {
};
}
+ enum class EABI {
+ Unknown,
+ Default, // Default means not specified
+ EABI4, // Target-specific (either 4, 5 or gnu depending on triple).
+ EABI5,
+ GNU
+ };
+
class TargetOptions {
public:
TargetOptions()
- : PrintMachineCode(false),
- LessPreciseFPMADOption(false), UnsafeFPMath(false),
- NoInfsFPMath(false), NoNaNsFPMath(false),
- HonorSignDependentRoundingFPMathOption(false),
- NoZerosInBSS(false),
- GuaranteedTailCallOpt(false),
- StackAlignmentOverride(0),
+ : PrintMachineCode(false), LessPreciseFPMADOption(false),
+ UnsafeFPMath(false), NoInfsFPMath(false), NoNaNsFPMath(false),
+ HonorSignDependentRoundingFPMathOption(false), NoZerosInBSS(false),
+ GuaranteedTailCallOpt(false), StackAlignmentOverride(0),
EnableFastISel(false), PositionIndependentExecutable(false),
UseInitArray(false), DisableIntegratedAS(false),
CompressDebugSections(false), FunctionSections(false),
DataSections(false), UniqueSectionNames(true), TrapUnreachable(false),
EmulatedTLS(false), FloatABIType(FloatABI::Default),
AllowFPOpFusion(FPOpFusion::Standard), Reciprocals(TargetRecip()),
- JTType(JumpTable::Single),
- ThreadModel(ThreadModel::POSIX) {}
+ JTType(JumpTable::Single), ThreadModel(ThreadModel::POSIX),
+ EABIVersion(EABI::Default) {}
/// PrintMachineCode - This flag is enabled when the -print-machineinstrs
/// option is specified on the command line, and should enable debugging
@@ -213,6 +218,9 @@ namespace llvm {
/// for things like atomics
ThreadModel::Model ThreadModel;
+ /// EABIVersion - This flag specifies the EABI version
+ EABI EABIVersion;
+
/// Machine level options.
MCTargetOptions MCOptions;
};
@@ -241,6 +249,7 @@ inline bool operator==(const TargetOptio
ARE_EQUAL(Reciprocals) &&
ARE_EQUAL(JTType) &&
ARE_EQUAL(ThreadModel) &&
+ ARE_EQUAL(EABIVersion) &&
ARE_EQUAL(MCOptions);
#undef ARE_EQUAL
}
Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=252462&r1=252461&r2=252462&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Mon Nov 9 06:40:30 2015
@@ -256,8 +256,10 @@ ARMTargetLowering::ARMTargetLowering(con
setLibcallName(RTLIB::SRL_I128, nullptr);
setLibcallName(RTLIB::SRA_I128, nullptr);
- if (Subtarget->isAAPCS_ABI() && !Subtarget->isTargetMachO() &&
- !Subtarget->isTargetWindows()) {
+ // RTLIB
+ if (Subtarget->isAAPCS_ABI() &&
+ (Subtarget->isTargetAEABI() || Subtarget->isTargetGNUAEABI() ||
+ Subtarget->isTargetAndroid())) {
static const struct {
const RTLIB::Libcall Op;
const char * const Name;
@@ -345,12 +347,6 @@ ARMTargetLowering::ARMTargetLowering(con
{ RTLIB::UDIV_I16, "__aeabi_uidiv", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID },
{ RTLIB::UDIV_I32, "__aeabi_uidiv", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID },
{ RTLIB::UDIV_I64, "__aeabi_uldivmod", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID },
-
- // Memory operations
- // RTABI chapter 4.3.4
- { RTLIB::MEMCPY, "__aeabi_memcpy", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID },
- { RTLIB::MEMMOVE, "__aeabi_memmove", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID },
- { RTLIB::MEMSET, "__aeabi_memset", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID },
};
for (const auto &LC : LibraryCalls) {
@@ -359,6 +355,30 @@ ARMTargetLowering::ARMTargetLowering(con
if (LC.Cond != ISD::SETCC_INVALID)
setCmpLibcallCC(LC.Op, LC.Cond);
}
+
+ // EABI dependent RTLIB
+ if (TM.Options.EABIVersion == EABI::EABI4 ||
+ TM.Options.EABIVersion == EABI::EABI5) {
+ static const struct {
+ const RTLIB::Libcall Op;
+ const char *const Name;
+ const CallingConv::ID CC;
+ const ISD::CondCode Cond;
+ } MemOpsLibraryCalls[] = {
+ // Memory operations
+ // RTABI chapter 4.3.4
+ { RTLIB::MEMCPY, "__aeabi_memcpy", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID },
+ { RTLIB::MEMMOVE, "__aeabi_memmove", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID },
+ { RTLIB::MEMSET, "__aeabi_memset", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID },
+ };
+
+ for (const auto &LC : MemOpsLibraryCalls) {
+ setLibcallName(LC.Op, LC.Name);
+ setLibcallCallingConv(LC.Op, LC.CC);
+ if (LC.Cond != ISD::SETCC_INVALID)
+ setCmpLibcallCC(LC.Op, LC.Cond);
+ }
+ }
}
if (Subtarget->isTargetWindows()) {
Modified: llvm/trunk/lib/Target/ARM/ARMSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMSubtarget.h?rev=252462&r1=252461&r2=252462&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMSubtarget.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMSubtarget.h Mon Nov 9 06:40:30 2015
@@ -380,6 +380,11 @@ public:
TargetTriple.getEnvironment() == Triple::EABIHF) &&
!isTargetDarwin() && !isTargetWindows();
}
+ bool isTargetGNUAEABI() const {
+ return (TargetTriple.getEnvironment() == Triple::GNUEABI ||
+ TargetTriple.getEnvironment() == Triple::GNUEABIHF) &&
+ !isTargetDarwin() && !isTargetWindows();
+ }
// ARM Targets that support EHABI exception handling standard
// Darwin uses SjLj. Other targets might need more checks.
Modified: llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp?rev=252462&r1=252461&r2=252462&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp Mon Nov 9 06:40:30 2015
@@ -188,6 +188,15 @@ ARMBaseTargetMachine::ARMBaseTargetMachi
if (Options.FloatABIType == FloatABI::Default)
this->Options.FloatABIType =
Subtarget.isTargetHardFloat() ? FloatABI::Hard : FloatABI::Soft;
+
+ // Default to triple-appropriate EABI
+ if (Options.EABIVersion == EABI::Default ||
+ Options.EABIVersion == EABI::Unknown) {
+ if (Subtarget.isTargetGNUAEABI())
+ this->Options.EABIVersion = EABI::GNU;
+ else
+ this->Options.EABIVersion = EABI::EABI5;
+ }
}
ARMBaseTargetMachine::~ARMBaseTargetMachine() {}
Added: llvm/trunk/test/CodeGen/ARM/arm-eabi.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/arm-eabi.ll?rev=252462&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/arm-eabi.ll (added)
+++ llvm/trunk/test/CodeGen/ARM/arm-eabi.ll Mon Nov 9 06:40:30 2015
@@ -0,0 +1,63 @@
+; RUN: llc < %s -mtriple=arm-none-eabi -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
+; RUN: llc < %s -mtriple=arm-none-eabihf -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
+; RUN: llc < %s -mtriple=arm-none-androideabi -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
+; RUN: llc < %s -mtriple=arm-none-gnueabi -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
+; RUN: llc < %s -mtriple=arm-none-gnueabihf -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
+; RUN: llc < %s -mtriple=arm-none-eabi -meabi=gnu -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
+; RUN: llc < %s -mtriple=arm-none-eabihf -meabi=gnu -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
+; RUN: llc < %s -mtriple=arm-none-androideabi -meabi=gnu -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
+; RUN: llc < %s -mtriple=arm-none-gnueabi -meabi=gnu -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
+; RUN: llc < %s -mtriple=arm-none-gnueabihf -meabi=gnu -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
+; RUN: llc < %s -mtriple=arm-none-eabi -meabi=4 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
+; RUN: llc < %s -mtriple=arm-none-eabihf -meabi=4 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
+; RUN: llc < %s -mtriple=arm-none-androideabi -meabi=4 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
+; RUN: llc < %s -mtriple=arm-none-gnueabi -meabi=4 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
+; RUN: llc < %s -mtriple=arm-none-gnueabihf -meabi=4 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
+; RUN: llc < %s -mtriple=arm-none-eabi -meabi=5 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
+; RUN: llc < %s -mtriple=arm-none-eabihf -meabi=5 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
+; RUN: llc < %s -mtriple=arm-none-androideabi -meabi=5 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
+; RUN: llc < %s -mtriple=arm-none-gnueabi -meabi=5 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
+; RUN: llc < %s -mtriple=arm-none-gnueabihf -meabi=5 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
+
+%struct.my_s = type { [18 x i32] }
+
+define void @foo(i32* %t) {
+ ; CHECK-LABEL: foo
+
+ %1 = alloca i32*, align 4
+ store i32* %t, i32** %1, align 4
+ %2 = load i32*, i32** %1, align 4
+ %3 = bitcast i32* %2 to %struct.my_s*
+ %4 = bitcast %struct.my_s* %3 to i8*
+ ; CHECK-EABI: bl __aeabi_memcpy
+ ; CHECK-GNUEABI: bl memcpy
+ call void @llvm.memcpy.p0i8.p0i8.i32(i8* %4, i8* inttoptr (i32 1 to i8*), i32 72, i32 4, i1 false)
+ ret void
+}
+
+define void @f1(i8* %dest, i8* %src) {
+entry:
+ ; CHECK-LABEL: f1
+
+ ; memmove
+ ; CHECK-EABI: bl __aeabi_memmove
+ ; CHECK-GNUEABI: bl memmove
+ call void @llvm.memmove.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 500, i32 0, i1 false)
+
+ ; memcpy
+ ; CHECK-EABI: bl __aeabi_memcpy
+ ; CHECK-GNUEABI: bl memcpy
+ call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 500, i32 0, i1 false)
+
+ ; memset
+ ; CHECK-EABI: mov r2, #1
+ ; CHECK-EABI: bl __aeabi_memset
+ ; CHECK-GNUEABI: mov r1, #1
+ ; CHECK-GNUEABI: bl memset
+ call void @llvm.memset.p0i8.i32(i8* %dest, i8 1, i32 500, i32 0, i1 false)
+ ret void
+}
+
+declare void @llvm.memmove.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
+declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
+declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) nounwind
Modified: llvm/trunk/test/CodeGen/ARM/memfunc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/memfunc.ll?rev=252462&r1=252461&r2=252462&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/memfunc.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/memfunc.ll Mon Nov 9 06:40:30 2015
@@ -1,79 +1,95 @@
-; RUN: llc < %s -mtriple=armv7-apple-ios -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-IOS --check-prefix=CHECK
-; RUN: llc < %s -mtriple=thumbv7m-none-macho -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-DARWIN --check-prefix=CHECK
-; RUN: llc < %s -mtriple=arm-none-eabi -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI --check-prefix=CHECK
-; RUN: llc < %s -mtriple=arm-none-eabihf -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI --check-prefix=CHECK
+; RUN: llc < %s -mtriple=armv7-apple-ios -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-IOS
+; RUN: llc < %s -mtriple=thumbv7m-none-macho -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-DARWIN
+; RUN: llc < %s -mtriple=arm-none-eabi -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
+; RUN: llc < %s -mtriple=arm-none-eabihf -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
+; RUN: llc < %s -mtriple=arm-none-androideabi -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
+; RUN: llc < %s -mtriple=arm-none-gnueabi -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
+; RUN: llc < %s -mtriple=arm-none-gnueabihf -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
define void @f1(i8* %dest, i8* %src) {
entry:
; CHECK-LABEL: f1
- ; CHECK-IOS: memmove
- ; CHECK-DARWIN: memmove
- ; CHECK-EABI: __aeabi_memmove
+ ; CHECK-IOS: bl _memmove
+ ; CHECK-DARWIN: bl _memmove
+ ; CHECK-EABI: bl __aeabi_memmove
+ ; CHECK-GNUEABI: bl memmove
call void @llvm.memmove.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 500, i32 0, i1 false)
- ; CHECK-IOS: memcpy
- ; CHECK-DARWIN: memcpy
- ; CHECK-EABI: __aeabi_memcpy
+ ; CHECK-IOS: bl _memcpy
+ ; CHECK-DARWIN: bl _memcpy
+ ; CHECK-EABI: bl __aeabi_memcpy
+ ; CHECK-GNUEABI: bl memcpy
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 500, i32 0, i1 false)
; EABI memset swaps arguments
; CHECK-IOS: mov r1, #1
- ; CHECK-IOS: memset
+ ; CHECK-IOS: bl _memset
; CHECK-DARWIN: movs r1, #1
- ; CHECK-DARWIN: memset
+ ; CHECK-DARWIN: bl _memset
; CHECK-EABI: mov r2, #1
- ; CHECK-EABI: __aeabi_memset
+ ; CHECK-EABI: bl __aeabi_memset
+ ; CHECK-GNUEABI: mov r1, #1
+ ; CHECK-GNUEABI: bl memset
call void @llvm.memset.p0i8.i32(i8* %dest, i8 1, i32 500, i32 0, i1 false)
; EABI uses memclr if value set to 0
; CHECK-IOS: mov r1, #0
- ; CHECK-IOS: memset
+ ; CHECK-IOS: bl _memset
; CHECK-DARWIN: movs r1, #0
- ; CHECK-DARWIN: memset
- ; CHECK-EABI: __aeabi_memclr
+ ; CHECK-DARWIN: bl _memset
+ ; CHECK-EABI: bl __aeabi_memclr
+ ; CHECK-GNUEABI: bl memset
call void @llvm.memset.p0i8.i32(i8* %dest, i8 0, i32 500, i32 0, i1 false)
-
+
; EABI uses aligned function variants if possible
- ; CHECK-IOS: memmove
- ; CHECK-DARWIN: memmove
- ; CHECK-EABI: __aeabi_memmove4
+ ; CHECK-IOS: bl _memmove
+ ; CHECK-DARWIN: bl _memmove
+ ; CHECK-EABI: bl __aeabi_memmove4
+ ; CHECK-GNUEABI: bl memmove
call void @llvm.memmove.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 500, i32 4, i1 false)
- ; CHECK-IOS: memcpy
- ; CHECK-DARWIN: memcpy
- ; CHECK-EABI: __aeabi_memcpy4
+ ; CHECK-IOS: bl _memcpy
+ ; CHECK-DARWIN: bl _memcpy
+ ; CHECK-EABI: bl __aeabi_memcpy4
+ ; CHECK-GNUEABI: bl memcpy
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 500, i32 4, i1 false)
- ; CHECK-IOS: memset
- ; CHECK-DARWIN: memset
- ; CHECK-EABI: __aeabi_memset4
+ ; CHECK-IOS: bl _memset
+ ; CHECK-DARWIN: bl _memset
+ ; CHECK-EABI: bl __aeabi_memset4
+ ; CHECK-GNUEABI: bl memset
call void @llvm.memset.p0i8.i32(i8* %dest, i8 1, i32 500, i32 4, i1 false)
- ; CHECK-IOS: memset
- ; CHECK-DARWIN: memset
- ; CHECK-EABI: __aeabi_memclr4
+ ; CHECK-IOS: bl _memset
+ ; CHECK-DARWIN: bl _memset
+ ; CHECK-EABI: bl __aeabi_memclr4
+ ; CHECK-GNUEABI: bl memset
call void @llvm.memset.p0i8.i32(i8* %dest, i8 0, i32 500, i32 4, i1 false)
- ; CHECK-IOS: memmove
- ; CHECK-DARWIN: memmove
- ; CHECK-EABI: __aeabi_memmove8
+ ; CHECK-IOS: bl _memmove
+ ; CHECK-DARWIN: bl _memmove
+ ; CHECK-EABI: bl __aeabi_memmove8
+ ; CHECK-GNUEABI: bl memmove
call void @llvm.memmove.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 500, i32 8, i1 false)
- ; CHECK-IOS: memcpy
- ; CHECK-DARWIN: memcpy
- ; CHECK-EABI: __aeabi_memcpy8
+ ; CHECK-IOS: bl _memcpy
+ ; CHECK-DARWIN: bl _memcpy
+ ; CHECK-EABI: bl __aeabi_memcpy8
+ ; CHECK-GNUEABI: bl memcpy
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 500, i32 8, i1 false)
- ; CHECK-IOS: memset
- ; CHECK-DARWIN: memset
- ; CHECK-EABI: __aeabi_memset8
+ ; CHECK-IOS: bl _memset
+ ; CHECK-DARWIN: bl _memset
+ ; CHECK-EABI: bl __aeabi_memset8
+ ; CHECK-GNUEABI: bl memset
call void @llvm.memset.p0i8.i32(i8* %dest, i8 1, i32 500, i32 8, i1 false)
- ; CHECK-IOS: memset
- ; CHECK-DARWIN: memset
- ; CHECK-EABI: __aeabi_memclr8
+ ; CHECK-IOS: bl _memset
+ ; CHECK-DARWIN: bl _memset
+ ; CHECK-EABI: bl __aeabi_memclr8
+ ; CHECK-GNUEABI: bl memset
call void @llvm.memset.p0i8.i32(i8* %dest, i8 0, i32 500, i32 8, i1 false)
unreachable
@@ -86,32 +102,38 @@ entry:
; IOS (ARMv7) should 8-byte align, others should 4-byte align
; CHECK-IOS: add r1, sp, #32
- ; CHECK-IOS: memmove
+ ; CHECK-IOS: bl _memmove
; CHECK-DARWIN: add r1, sp, #28
- ; CHECK-DARWIN: memmove
+ ; CHECK-DARWIN: bl _memmove
; CHECK-EABI: add r1, sp, #28
- ; CHECK-EABI: __aeabi_memmove
+ ; CHECK-EABI: bl __aeabi_memmove
+ ; CHECK-GNUEABI: add r1, sp, #28
+ ; CHECK-GNUEABI: bl memmove
%arr0 = alloca [9 x i8], align 1
%0 = bitcast [9 x i8]* %arr0 to i8*
call void @llvm.memmove.p0i8.p0i8.i32(i8* %dest, i8* %0, i32 %n, i32 0, i1 false)
; CHECK: add r1, sp, #16
- ; CHECK-IOS: memcpy
- ; CHECK-DARWIN: memcpy
- ; CHECK-EABI: __aeabi_memcpy
+ ; CHECK-IOS: bl _memcpy
+ ; CHECK-DARWIN: bl _memcpy
+ ; CHECK-EABI: bl __aeabi_memcpy
+ ; CHECK-GNUEABI: bl memcpy
%arr1 = alloca [9 x i8], align 1
%1 = bitcast [9 x i8]* %arr1 to i8*
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %1, i32 %n, i32 0, i1 false)
; CHECK-IOS: mov r0, sp
; CHECK-IOS: mov r1, #1
- ; CHECK-IOS: memset
+ ; CHECK-IOS: bl _memset
; CHECK-DARWIN: add r0, sp, #4
; CHECK-DARWIN: movs r1, #1
- ; CHECK-DARWIN: memset
+ ; CHECK-DARWIN: bl _memset
; CHECK-EABI: add r0, sp, #4
; CHECK-EABI: mov r2, #1
- ; CHECK-EABI: __aeabi_memset
+ ; CHECK-EABI: bl __aeabi_memset
+ ; CHECK-GNUEABI: add r0, sp, #4
+ ; CHECK-GNUEABI: mov r1, #1
+ ; CHECK-GNUEABI: bl memset
%arr2 = alloca [9 x i8], align 1
%2 = bitcast [9 x i8]* %arr2 to i8*
call void @llvm.memset.p0i8.i32(i8* %2, i8 1, i32 %n, i32 0, i1 false)
@@ -125,28 +147,32 @@ entry:
; CHECK-LABEL: f3
; CHECK: {{add(.w)? r1, sp, #17|sub(.w)? r1, r7, #15}}
- ; CHECK-IOS: memmove
- ; CHECK-DARWIN: memmove
- ; CHECK-EABI: __aeabi_memmove
+ ; CHECK-IOS: bl _memmove
+ ; CHECK-DARWIN: bl _memmove
+ ; CHECK-EABI: bl __aeabi_memmove
+ ; CHECK-GNUEABI: bl memmove
%arr0 = alloca [7 x i8], align 1
%0 = bitcast [7 x i8]* %arr0 to i8*
call void @llvm.memmove.p0i8.p0i8.i32(i8* %dest, i8* %0, i32 %n, i32 0, i1 false)
; CHECK: {{add(.w)? r1, sp, #10}}
- ; CHECK-IOS: memcpy
- ; CHECK-DARWIN: memcpy
- ; CHECK-EABI: __aeabi_memcpy
+ ; CHECK-IOS: bl _memcpy
+ ; CHECK-DARWIN: bl _memcpy
+ ; CHECK-EABI: bl __aeabi_memcpy
+ ; CHECK-GNUEABI: bl memcpy
%arr1 = alloca [7 x i8], align 1
%1 = bitcast [7 x i8]* %arr1 to i8*
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %1, i32 %n, i32 0, i1 false)
; CHECK: {{add(.w)? r0, sp, #3}}
; CHECK-IOS: mov r1, #1
- ; CHECK-IOS: memset
+ ; CHECK-IOS: bl _memset
; CHECK-DARWIN: movs r1, #1
- ; CHECK-DARWIN: memset
+ ; CHECK-DARWIN: bl _memset
; CHECK-EABI: mov r2, #1
- ; CHECK-EABI: __aeabi_memset
+ ; CHECK-EABI: bl __aeabi_memset
+ ; CHECK-GNUEABI: mov r1, #1
+ ; CHECK-GNUEABI: bl memset
%arr2 = alloca [7 x i8], align 1
%2 = bitcast [7 x i8]* %arr2 to i8*
call void @llvm.memset.p0i8.i32(i8* %2, i8 1, i32 %n, i32 0, i1 false)
@@ -160,28 +186,32 @@ entry:
; CHECK-LABEL: f4
; CHECK: {{add(.w)? r., sp, #23|sub(.w)? r., r7, #17}}
- ; CHECK-IOS: memmove
- ; CHECK-DARWIN: memmove
- ; CHECK-EABI: __aeabi_memmove
+ ; CHECK-IOS: bl _memmove
+ ; CHECK-DARWIN: bl _memmove
+ ; CHECK-EABI: bl __aeabi_memmove
+ ; CHECK-GNUEABI: bl memmove
%arr0 = alloca [9 x i8], align 1
%0 = getelementptr inbounds [9 x i8], [9 x i8]* %arr0, i32 0, i32 4
call void @llvm.memmove.p0i8.p0i8.i32(i8* %dest, i8* %0, i32 %n, i32 0, i1 false)
; CHECK: {{add(.w)? r., sp, #(10|14)}}
- ; CHECK-IOS: memcpy
- ; CHECK-DARWIN: memcpy
- ; CHECK-EABI: __aeabi_memcpy
+ ; CHECK-IOS: bl _memcpy
+ ; CHECK-DARWIN: bl _memcpy
+ ; CHECK-EABI: bl __aeabi_memcpy
+ ; CHECK-GNUEABI: bl memcpy
%arr1 = alloca [9 x i8], align 1
%1 = getelementptr inbounds [9 x i8], [9 x i8]* %arr1, i32 0, i32 4
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %1, i32 %n, i32 0, i1 false)
; CHECK: {{add(.w)? r., sp, #(1|5)}}
; CHECK-IOS: mov r1, #1
- ; CHECK-IOS: memset
+ ; CHECK-IOS: bl _memset
; CHECK-DARWIN: movs r1, #1
- ; CHECK-DARWIN: memset
+ ; CHECK-DARWIN: bl _memset
; CHECK-EABI: mov r2, #1
- ; CHECK-EABI: __aeabi_memset
+ ; CHECK-EABI: bl __aeabi_memset
+ ; CHECK-GNUEABI: mov r1, #1
+ ; CHECK-GNUEABI: bl memset
%arr2 = alloca [9 x i8], align 1
%2 = getelementptr inbounds [9 x i8], [9 x i8]* %arr2, i32 0, i32 4
call void @llvm.memset.p0i8.i32(i8* %2, i8 1, i32 %n, i32 0, i1 false)
@@ -195,28 +225,32 @@ entry:
; CHECK-LABEL: f5
; CHECK: {{add(.w)? r., sp, #27|sub(.w)? r., r7, #21}}
- ; CHECK-IOS: memmove
- ; CHECK-DARWIN: memmove
- ; CHECK-EABI: __aeabi_memmove
+ ; CHECK-IOS: bl _memmove
+ ; CHECK-DARWIN: bl _memmove
+ ; CHECK-EABI: bl __aeabi_memmove
+ ; CHECK-GNUEABI: bl memmove
%arr0 = alloca [13 x i8], align 1
%0 = getelementptr inbounds [13 x i8], [13 x i8]* %arr0, i32 0, i32 1
call void @llvm.memmove.p0i8.p0i8.i32(i8* %dest, i8* %0, i32 %n, i32 0, i1 false)
; CHECK: {{add(.w)? r., sp, #(10|14)}}
- ; CHECK-IOS: memcpy
- ; CHECK-DARWIN: memcpy
- ; CHECK-EABI: __aeabi_memcpy
+ ; CHECK-IOS: bl _memcpy
+ ; CHECK-DARWIN: bl _memcpy
+ ; CHECK-EABI: bl __aeabi_memcpy
+ ; CHECK-GNUEABI: bl memcpy
%arr1 = alloca [13 x i8], align 1
%1 = getelementptr inbounds [13 x i8], [13 x i8]* %arr1, i32 0, i32 1
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %1, i32 %n, i32 0, i1 false)
; CHECK: {{add(.w)? r., sp, #(1|5)}}
; CHECK-IOS: mov r1, #1
- ; CHECK-IOS: memset
+ ; CHECK-IOS: bl _memset
; CHECK-DARWIN: movs r1, #1
- ; CHECK-DARWIN: memset
+ ; CHECK-DARWIN: bl _memset
; CHECK-EABI: mov r2, #1
- ; CHECK-EABI: __aeabi_memset
+ ; CHECK-EABI: bl __aeabi_memset
+ ; CHECK-GNUEABI: mov r1, #1
+ ; CHECK-GNUEABI: bl memset
%arr2 = alloca [13 x i8], align 1
%2 = getelementptr inbounds [13 x i8], [13 x i8]* %arr2, i32 0, i32 1
call void @llvm.memset.p0i8.i32(i8* %2, i8 1, i32 %n, i32 0, i1 false)
@@ -230,28 +264,32 @@ entry:
; CHECK-LABEL: f6
; CHECK: {{add(.w)? r., sp, #27|sub(.w)? r., r7, #25}}
- ; CHECK-IOS: memmove
- ; CHECK-DARWIN: memmove
- ; CHECK-EABI: __aeabi_memmove
+ ; CHECK-IOS: bl _memmove
+ ; CHECK-DARWIN: bl _memmove
+ ; CHECK-EABI: bl __aeabi_memmove
+ ; CHECK-GNUEABI: bl memmove
%arr0 = alloca [13 x i8], align 1
%0 = getelementptr inbounds [13 x i8], [13 x i8]* %arr0, i32 0, i32 %i
call void @llvm.memmove.p0i8.p0i8.i32(i8* %dest, i8* %0, i32 %n, i32 0, i1 false)
; CHECK: {{add(.w)? r., sp, #(10|14)}}
- ; CHECK-IOS: memcpy
- ; CHECK-DARWIN: memcpy
- ; CHECK-EABI: __aeabi_memcpy
+ ; CHECK-IOS: bl _memcpy
+ ; CHECK-DARWIN: bl _memcpy
+ ; CHECK-EABI: bl __aeabi_memcpy
+ ; CHECK-GNUEABI: bl memcpy
%arr1 = alloca [13 x i8], align 1
%1 = getelementptr inbounds [13 x i8], [13 x i8]* %arr1, i32 0, i32 %i
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %1, i32 %n, i32 0, i1 false)
; CHECK: {{add(.w)? r., sp, #(1|5)}}
; CHECK-IOS: mov r1, #1
- ; CHECK-IOS: memset
+ ; CHECK-IOS: bl _memset
; CHECK-DARWIN: movs r1, #1
- ; CHECK-DARWIN: memset
+ ; CHECK-DARWIN: bl _memset
; CHECK-EABI: mov r2, #1
- ; CHECK-EABI: __aeabi_memset
+ ; CHECK-EABI: bl __aeabi_memset
+ ; CHECK-GNUEABI: mov r1, #1
+ ; CHECK-GNUEABI: bl memset
%arr2 = alloca [13 x i8], align 1
%2 = getelementptr inbounds [13 x i8], [13 x i8]* %arr2, i32 0, i32 %i
call void @llvm.memset.p0i8.i32(i8* %2, i8 1, i32 %n, i32 0, i1 false)
@@ -265,28 +303,32 @@ entry:
; CHECK-LABEL: f7
; CHECK: {{add(.w)? r., sp, #27|sub(.w)? r., r7, #21}}
- ; CHECK-IOS: memmove
- ; CHECK-DARWIN: memmove
- ; CHECK-EABI: __aeabi_memmove
+ ; CHECK-IOS: bl _memmove
+ ; CHECK-DARWIN: bl _memmove
+ ; CHECK-EABI: bl __aeabi_memmove
+ ; CHECK-GNUEABI: bl memmove
%arr0 = alloca [13 x i8], align 1
%0 = getelementptr [13 x i8], [13 x i8]* %arr0, i32 0, i32 4
call void @llvm.memmove.p0i8.p0i8.i32(i8* %dest, i8* %0, i32 %n, i32 0, i1 false)
; CHECK: {{add(.w)? r., sp, #(10|14)}}
- ; CHECK-IOS: memcpy
- ; CHECK-DARWIN: memcpy
- ; CHECK-EABI: __aeabi_memcpy
+ ; CHECK-IOS: bl _memcpy
+ ; CHECK-DARWIN: bl _memcpy
+ ; CHECK-EABI: bl __aeabi_memcpy
+ ; CHECK-GNUEABI: bl memcpy
%arr1 = alloca [13 x i8], align 1
%1 = getelementptr [13 x i8], [13 x i8]* %arr1, i32 0, i32 4
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %1, i32 %n, i32 0, i1 false)
; CHECK: {{add(.w)? r., sp, #(1|5)}}
; CHECK-IOS: mov r1, #1
- ; CHECK-IOS: memset
+ ; CHECK-IOS: bl _memset
; CHECK-DARWIN: movs r1, #1
- ; CHECK-DARWIN: memset
+ ; CHECK-DARWIN: bl _memset
; CHECK-EABI: mov r2, #1
- ; CHECK-EABI: __aeabi_memset
+ ; CHECK-EABI: bl __aeabi_memset
+ ; CHECK-GNUEABI: mov r1, #1
+ ; CHECK-GNUEABI: bl memset
%arr2 = alloca [13 x i8], align 1
%2 = getelementptr [13 x i8], [13 x i8]* %arr2, i32 0, i32 4
call void @llvm.memset.p0i8.i32(i8* %2, i8 1, i32 %n, i32 0, i1 false)
@@ -300,28 +342,32 @@ entry:
; CHECK-LABEL: f8
; CHECK: {{add(.w)? r., sp, #27|sub(.w)? r., r7, #21}}
- ; CHECK-IOS: memmove
- ; CHECK-DARWIN: memmove
- ; CHECK-EABI: __aeabi_memmove
+ ; CHECK-IOS: bl _memmove
+ ; CHECK-DARWIN: bl _memmove
+ ; CHECK-EABI: bl __aeabi_memmove
+ ; CHECK-GNUEABI: bl memmove
%arr0 = alloca [13 x i8], align 1
%0 = getelementptr inbounds [13 x i8], [13 x i8]* %arr0, i32 0, i32 16
call void @llvm.memmove.p0i8.p0i8.i32(i8* %dest, i8* %0, i32 %n, i32 0, i1 false)
; CHECK: {{add(.w)? r., sp, #(10|14)}}
- ; CHECK-IOS: memcpy
- ; CHECK-DARWIN: memcpy
- ; CHECK-EABI: __aeabi_memcpy
+ ; CHECK-IOS: bl _memcpy
+ ; CHECK-DARWIN: bl _memcpy
+ ; CHECK-EABI: bl __aeabi_memcpy
+ ; CHECK-GNUEABI: bl memcpy
%arr1 = alloca [13 x i8], align 1
%1 = getelementptr inbounds [13 x i8], [13 x i8]* %arr1, i32 0, i32 16
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %1, i32 %n, i32 0, i1 false)
; CHECK: {{add(.w)? r., sp, #(1|5)}}
; CHECK-IOS: mov r1, #1
- ; CHECK-IOS: memset
+ ; CHECK-IOS: bl _memset
; CHECK-DARWIN: movs r1, #1
- ; CHECK-DARWIN: memset
+ ; CHECK-DARWIN: bl _memset
; CHECK-EABI: mov r2, #1
- ; CHECK-EABI: __aeabi_memset
+ ; CHECK-EABI: bl __aeabi_memset
+ ; CHECK-GNUEABI: mov r1, #1
+ ; CHECK-GNUEABI: bl memset
%arr2 = alloca [13 x i8], align 1
%2 = getelementptr inbounds [13 x i8], [13 x i8]* %arr2, i32 0, i32 16
call void @llvm.memset.p0i8.i32(i8* %2, i8 1, i32 %n, i32 0, i1 false)
@@ -357,6 +403,7 @@ entry:
; CHECK-IOS: .align 3
; CHECK-DARWIN: .align 2
; CHECK-EABI: .align 2
+; CHECK-GNUEABI: .align 2
; CHECK: arr2:
; CHECK: {{\.section.+foo,bar}}
; CHECK-NOT: .align
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