[lld] r252415 - [ELF2/AArch64] Support R_AARCH64_LDST64_ABS_LO12_NC relocation.

Davide Italiano via llvm-commits llvm-commits at lists.llvm.org
Sat Nov 7 20:54:54 PST 2015


On Sat, Nov 7, 2015 at 8:45 PM, Davide Italiano via llvm-commits
<llvm-commits at lists.llvm.org> wrote:
> Author: davide
> Date: Sat Nov  7 22:45:26 2015
> New Revision: 252415
>
> URL: http://llvm.org/viewvc/llvm-project?rev=252415&view=rev
> Log:
> [ELF2/AArch64] Support R_AARCH64_LDST64_ABS_LO12_NC relocation.
>

This one is a little bit unusual because it sets the ld/st immediate
value to the bits [11:3] of S + A or'ed with the contents.
It seems to not require the bits storing the immediate in
the instruction to be zero, as the testcase shows (in fact, they're
0x3 before the relocation is applied). The spec doesn't really say
anything about these bits being zero, but it seems weird to have a
.rela depending both on the contents and addend (Rafael noticed the
same in another relocation).
OTOH this emits the correct value, which is also what oher linkers emit.

Tim, as owner of AArch64 backend, do you think this is the correct way
of handling it?

Thanks,

--
Davide


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