[llvm] r252297 - [mips][ias] Range check uimm4 operands and fixed a bug this revealed.
Daniel Sanders via llvm-commits
llvm-commits at lists.llvm.org
Fri Nov 6 04:41:43 PST 2015
Author: dsanders
Date: Fri Nov 6 06:41:43 2015
New Revision: 252297
URL: http://llvm.org/viewvc/llvm-project?rev=252297&view=rev
Log:
[mips][ias] Range check uimm4 operands and fixed a bug this revealed.
Summary:
The bug was that the sldi instructions have immediate widths dependant on
their element size. So sldi.d has a 1-bit immediate and sldi.b has a 4-bit
immediate. All of these were using 4-bit immediates previously.
Reviewers: vkalintiris
Subscribers: llvm-commits, atanasyan, dsanders
Differential Revision: http://reviews.llvm.org/D14018
Added:
llvm/trunk/test/MC/Mips/micromips/
llvm/trunk/test/MC/Mips/micromips/invalid.s
Modified:
llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
llvm/trunk/lib/Target/Mips/MipsInstrInfo.td
llvm/trunk/lib/Target/Mips/MipsMSAInstrInfo.td
llvm/trunk/test/MC/Mips/msa/invalid-64.s
llvm/trunk/test/MC/Mips/msa/invalid.s
Modified: llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp?rev=252297&r1=252296&r2=252297&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp (original)
+++ llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp Fri Nov 6 06:41:43 2015
@@ -3300,6 +3300,9 @@ bool MipsAsmParser::MatchAndEmitInstruct
return Error(IDLoc, "source and destination must be different");
case Match_Immz:
return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo), "expected '0'");
+ case Match_UImm1_0:
+ return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo),
+ "expected 1-bit unsigned immediate");
case Match_UImm2_0:
return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo),
"expected 2-bit unsigned immediate");
@@ -3309,6 +3312,9 @@ bool MipsAsmParser::MatchAndEmitInstruct
case Match_UImm3_0:
return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo),
"expected 3-bit unsigned immediate");
+ case Match_UImm4_0:
+ return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo),
+ "expected 4-bit unsigned immediate");
}
llvm_unreachable("Implement any new match types added!");
Modified: llvm/trunk/lib/Target/Mips/MipsInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsInstrInfo.td?rev=252297&r1=252296&r2=252297&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsInstrInfo.td (original)
+++ llvm/trunk/lib/Target/Mips/MipsInstrInfo.td Fri Nov 6 06:41:43 2015
@@ -390,17 +390,21 @@ class ConstantUImmAsmOperandClass<int Bi
let DiagnosticType = "UImm" # Bits # "_" # Offset;
}
+def ConstantUImm4AsmOperandClass
+ : ConstantUImmAsmOperandClass<4, []>;
def ConstantUImm3AsmOperandClass
- : ConstantUImmAsmOperandClass<3, []>;
+ : ConstantUImmAsmOperandClass<3, [ConstantUImm4AsmOperandClass]>;
def ConstantUImm2Plus1AsmOperandClass
: ConstantUImmAsmOperandClass<2, [ConstantUImm3AsmOperandClass], 1>;
def ConstantUImm2AsmOperandClass
: ConstantUImmAsmOperandClass<2, [ConstantUImm3AsmOperandClass]>;
+def ConstantUImm1AsmOperandClass
+ : ConstantUImmAsmOperandClass<1, [ConstantUImm2AsmOperandClass]>;
def ConstantImmzAsmOperandClass : AsmOperandClass {
let Name = "ConstantImmz";
let RenderMethod = "addConstantUImmOperands<1>";
let PredicateMethod = "isConstantImmz";
- let SuperClasses = [ConstantUImm2AsmOperandClass];
+ let SuperClasses = [ConstantUImm1AsmOperandClass];
let DiagnosticType = "Immz";
}
@@ -477,7 +481,7 @@ def uimmz : Operand<i32> {
}
// Unsigned Operands
-foreach I = {2, 3} in
+foreach I = {1, 2, 3, 4} in
def uimm # I : Operand<i32> {
let PrintMethod = "printUnsignedImm";
let ParserMatchClass =
Modified: llvm/trunk/lib/Target/Mips/MipsMSAInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsMSAInstrInfo.td?rev=252297&r1=252296&r2=252297&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsMSAInstrInfo.td (original)
+++ llvm/trunk/lib/Target/Mips/MipsMSAInstrInfo.td Fri Nov 6 06:41:43 2015
@@ -70,10 +70,6 @@ def immZExt6Ptr : ImmLeaf<iPTR, [{return
// Operands
-def uimm4 : Operand<i32> {
- let PrintMethod = "printUnsignedImm8";
-}
-
def uimm4_ptr : Operand<iPTR> {
let PrintMethod = "printUnsignedImm8";
}
@@ -1277,13 +1273,14 @@ class MSA_COPY_DESC_BASE<string instr_as
}
class MSA_ELM_SLD_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
- RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
+ RegisterOperand ROWD, RegisterOperand ROWS,
+ Operand ImmOp, ImmLeaf Imm,
InstrItinClass itin = NoItinerary> {
dag OutOperandList = (outs ROWD:$wd);
- dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, uimm4:$n);
+ dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, ImmOp:$n);
string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$n]");
list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWD:$wd_in, ROWS:$ws,
- immZExt4:$n))];
+ Imm:$n))];
string Constraints = "$wd = $wd_in";
InstrItinClass Itinerary = itin;
}
@@ -2573,13 +2570,17 @@ class SLD_W_DESC : MSA_3R_SLD_DESC_BASE<
class SLD_D_DESC : MSA_3R_SLD_DESC_BASE<"sld.d", int_mips_sld_d, MSA128DOpnd>;
class SLDI_B_DESC : MSA_ELM_SLD_DESC_BASE<"sldi.b", int_mips_sldi_b,
- MSA128BOpnd>;
+ MSA128BOpnd, MSA128BOpnd, uimm4,
+ immZExt4>;
class SLDI_H_DESC : MSA_ELM_SLD_DESC_BASE<"sldi.h", int_mips_sldi_h,
- MSA128HOpnd>;
+ MSA128HOpnd, MSA128HOpnd, uimm3,
+ immZExt3>;
class SLDI_W_DESC : MSA_ELM_SLD_DESC_BASE<"sldi.w", int_mips_sldi_w,
- MSA128WOpnd>;
+ MSA128WOpnd, MSA128WOpnd, uimm2,
+ immZExt2>;
class SLDI_D_DESC : MSA_ELM_SLD_DESC_BASE<"sldi.d", int_mips_sldi_d,
- MSA128DOpnd>;
+ MSA128DOpnd, MSA128DOpnd, uimm1,
+ immZExt1>;
class SLL_B_DESC : MSA_3R_DESC_BASE<"sll.b", shl, MSA128BOpnd>;
class SLL_H_DESC : MSA_3R_DESC_BASE<"sll.h", shl, MSA128HOpnd>;
Added: llvm/trunk/test/MC/Mips/micromips/invalid.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/micromips/invalid.s?rev=252297&view=auto
==============================================================================
--- llvm/trunk/test/MC/Mips/micromips/invalid.s (added)
+++ llvm/trunk/test/MC/Mips/micromips/invalid.s Fri Nov 6 06:41:43 2015
@@ -0,0 +1,7 @@
+# RUN: not llvm-mc %s -triple=mips -show-encoding -mattr=micromips 2>%t1
+# RUN: FileCheck %s < %t1
+
+ break16 -1 # CHECK: :[[@LINE]]:11: error: expected 4-bit unsigned immediate
+ break16 16 # CHECK: :[[@LINE]]:11: error: expected 4-bit unsigned immediate
+ sdbbp16 -1 # CHECK: :[[@LINE]]:11: error: expected 4-bit unsigned immediate
+ sdbbp16 16 # CHECK: :[[@LINE]]:11: error: expected 4-bit unsigned immediate
Modified: llvm/trunk/test/MC/Mips/msa/invalid-64.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/msa/invalid-64.s?rev=252297&r1=252296&r2=252297&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/msa/invalid-64.s (original)
+++ llvm/trunk/test/MC/Mips/msa/invalid-64.s Fri Nov 6 06:41:43 2015
@@ -15,8 +15,20 @@
lsa $2, $3, $4, 5 # CHECK: :[[@LINE]]:25: error: expected immediate in range 1 .. 4
sat_s.b $w31, $w31, -1 # CHECK: :[[@LINE]]:25: error: expected 3-bit unsigned immediate
sat_s.b $w31, $w31, 8 # CHECK: :[[@LINE]]:25: error: expected 3-bit unsigned immediate
+ sat_s.h $w31, $w31, -1 # CHECK: :[[@LINE]]:25: error: expected 4-bit unsigned immediate
+ sat_s.h $w31, $w31, 16 # CHECK: :[[@LINE]]:25: error: expected 4-bit unsigned immediate
sat_u.b $w31, $w31, -1 # CHECK: :[[@LINE]]:25: error: expected 3-bit unsigned immediate
sat_u.b $w31, $w31, 8 # CHECK: :[[@LINE]]:25: error: expected 3-bit unsigned immediate
+ sat_u.h $w31, $w31, -1 # CHECK: :[[@LINE]]:25: error: expected 4-bit unsigned immediate
+ sat_u.h $w31, $w31, 16 # CHECK: :[[@LINE]]:25: error: expected 4-bit unsigned immediate
+ sldi.b $w0, $w29[-1] # CHECK: :[[@LINE]]:22: error: expected 4-bit unsigned immediate
+ sldi.b $w0, $w29[16] # CHECK: :[[@LINE]]:22: error: expected 4-bit unsigned immediate
+ sldi.d $w4, $w12[-1] # CHECK: :[[@LINE]]:22: error: expected 1-bit unsigned immediate
+ sldi.d $w4, $w12[2] # CHECK: :[[@LINE]]:22: error: expected 1-bit unsigned immediate
+ sldi.h $w8, $w17[-1] # CHECK: :[[@LINE]]:22: error: expected 3-bit unsigned immediate
+ sldi.h $w8, $w17[8] # CHECK: :[[@LINE]]:22: error: expected 3-bit unsigned immediate
+ sldi.w $w20, $w27[-1] # CHECK: :[[@LINE]]:23: error: expected 2-bit unsigned immediate
+ sldi.w $w20, $w27[4] # CHECK: :[[@LINE]]:23: error: expected 2-bit unsigned immediate
srari.b $w5, $w25, -1 # CHECK: :[[@LINE]]:24: error: expected 3-bit unsigned immediate
srari.b $w5, $w25, 8 # CHECK: :[[@LINE]]:24: error: expected 3-bit unsigned immediate
srlri.b $w18, $w3, -1 # CHECK: :[[@LINE]]:24: error: expected 3-bit unsigned immediate
Modified: llvm/trunk/test/MC/Mips/msa/invalid.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/msa/invalid.s?rev=252297&r1=252296&r2=252297&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/msa/invalid.s (original)
+++ llvm/trunk/test/MC/Mips/msa/invalid.s Fri Nov 6 06:41:43 2015
@@ -13,8 +13,20 @@
lsa $2, $3, $4, 5 # CHECK: :[[@LINE]]:25: error: expected immediate in range 1 .. 4
sat_s.b $w31, $w31, -1 # CHECK: :[[@LINE]]:25: error: expected 3-bit unsigned immediate
sat_s.b $w31, $w31, 8 # CHECK: :[[@LINE]]:25: error: expected 3-bit unsigned immediate
+ sat_s.h $w31, $w31, -1 # CHECK: :[[@LINE]]:25: error: expected 4-bit unsigned immediate
+ sat_s.h $w31, $w31, 16 # CHECK: :[[@LINE]]:25: error: expected 4-bit unsigned immediate
sat_u.b $w31, $w31, -1 # CHECK: :[[@LINE]]:25: error: expected 3-bit unsigned immediate
sat_u.b $w31, $w31, 8 # CHECK: :[[@LINE]]:25: error: expected 3-bit unsigned immediate
+ sat_u.h $w31, $w31, -1 # CHECK: :[[@LINE]]:25: error: expected 4-bit unsigned immediate
+ sat_u.h $w31, $w31, 16 # CHECK: :[[@LINE]]:25: error: expected 4-bit unsigned immediate
+ sldi.b $w0, $w29[-1] # CHECK: :[[@LINE]]:22: error: expected 4-bit unsigned immediate
+ sldi.b $w0, $w29[16] # CHECK: :[[@LINE]]:22: error: expected 4-bit unsigned immediate
+ sldi.d $w4, $w12[-1] # CHECK: :[[@LINE]]:22: error: expected 1-bit unsigned immediate
+ sldi.d $w4, $w12[2] # CHECK: :[[@LINE]]:22: error: expected 1-bit unsigned immediate
+ sldi.h $w8, $w17[-1] # CHECK: :[[@LINE]]:22: error: expected 3-bit unsigned immediate
+ sldi.h $w8, $w17[8] # CHECK: :[[@LINE]]:22: error: expected 3-bit unsigned immediate
+ sldi.w $w20, $w27[-1] # CHECK: :[[@LINE]]:23: error: expected 2-bit unsigned immediate
+ sldi.w $w20, $w27[4] # CHECK: :[[@LINE]]:23: error: expected 2-bit unsigned immediate
srari.b $w5, $w25, -1 # CHECK: :[[@LINE]]:24: error: expected 3-bit unsigned immediate
srari.b $w5, $w25, 8 # CHECK: :[[@LINE]]:24: error: expected 3-bit unsigned immediate
srlri.b $w18, $w3, -1 # CHECK: :[[@LINE]]:24: error: expected 3-bit unsigned immediate
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