[llvm] r252139 - AMDGPU: Make addr64 atomic operand order consistent

[Matt Arsenault via llvm-commits]

Author: arsenm
Date: Wed Nov  4 20:46:53 2015
New Revision: 252139

URL: http://llvm.org/viewvc/llvm-project?rev=252139&view=rev
Log:
AMDGPU: Make addr64 atomic operand order consistent

vaddr comes before srsrc in every other MUBUF instruction,
and is the order it is printed.

Modified:
    llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.td

Modified: llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.td?rev=252139&r1=252138&r2=252139&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.td (original)
+++ llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.td Wed Nov  4 20:46:53 2015
@@ -2391,7 +2391,7 @@ multiclass MUBUF_Atomic <mubuf op, strin
 
       defm _ADDR64 : MUBUFAtomicAddr64_m <
         op, name#"_addr64", (outs),
-        (ins rc:$vdata, SReg_128:$srsrc, VReg_64:$vaddr,
+        (ins rc:$vdata, VReg_64:$vaddr, SReg_128:$srsrc,
              SCSrc_32:$soffset, mbuf_offset:$offset, slc:$slc),
         name#" $vdata, $vaddr, $srsrc, $soffset addr64"#"$offset"#"$slc", [], 0
       >;
@@ -2410,7 +2410,7 @@ multiclass MUBUF_Atomic <mubuf op, strin
 
       defm _RTN_ADDR64 : MUBUFAtomicAddr64_m <
         op, name#"_rtn_addr64", (outs rc:$vdata),
-        (ins rc:$vdata_in, SReg_128:$srsrc, VReg_64:$vaddr,
+        (ins rc:$vdata_in, VReg_64:$vaddr, SReg_128:$srsrc,
              SCSrc_32:$soffset, mbuf_offset:$offset, slc:$slc),
         name#" $vdata, $vaddr, $srsrc, $soffset addr64"#"$offset"#" glc"#"$slc",
         [(set vt:$vdata,