[PATCH] D13873: AMDGPU: Rename enums to be consistent with HSA code object terminology

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Wed Nov 4 18:46:14 PST 2015


arsenm added inline comments.

================
Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:605-610
@@ -604,8 +605,1 @@
-          TRI->getPreloadedValue(MF, SIRegisterInfo::DISPATCH_PTR);
-      unsigned DispatchPtrRegLo =
-          TRI->getPhysRegSubReg(DispatchPtrReg, &AMDGPU::SReg_32RegClass, 0);
-      unsigned DispatchPtrRegHi =
-          TRI->getPhysRegSubReg(DispatchPtrReg, &AMDGPU::SReg_32RegClass, 1);
-      CCInfo.AllocateReg(DispatchPtrRegLo);
-      CCInfo.AllocateReg(DispatchPtrRegHi);
       MF.addLiveIn(DispatchPtrReg, &AMDGPU::SReg_64RegClass);
----------------
tstellarAMD wrote:
> This seems to be an unrelated change.
This is just a cleanup because it isn't necessary to call AllocateReg for the subregister individually. I can split it out.


http://reviews.llvm.org/D13873





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