[PATCH] D14268: AMDGPU: Split x8 and x16 vector loads instead of scalarize

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Mon Nov 2 16:43:31 PST 2015


arsenm created this revision.
arsenm added a reviewer: tstellarAMD.
arsenm added a subscriber: llvm-commits.
Herald added a subscriber: arsenm.

The one regression in the builtin tests is in the read2 test which now
(again) has many extra copies, but this should be solved once the pass
is replaced with a DAG combine.

http://reviews.llvm.org/D14268

Files:
  lib/Target/AMDGPU/AMDGPUISelLowering.cpp
  lib/Target/AMDGPU/SIISelLowering.cpp
  test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
  test/CodeGen/AMDGPU/ds_read2_superreg.ll
  test/CodeGen/AMDGPU/global-extload-i32.ll
  test/CodeGen/AMDGPU/half.ll
  test/CodeGen/AMDGPU/load.ll
  test/CodeGen/AMDGPU/merge-stores.ll
  test/CodeGen/AMDGPU/reorder-stores.ll
  test/CodeGen/AMDGPU/salu-to-valu.ll

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