[PATCHES] AMDGPU/SI: Small ISel improvements

[Marek Olšák via llvm-commits]

On Thu, Oct 15, 2015 at 8:05 AM, Michel Dänzer <michel at daenzer.net> wrote:
> On 15.10.2015 12:07, Michel Dänzer wrote:
>> On 15.10.2015 03:15, Marek Olšák via llvm-commits wrote:
>>> @@ -2617,10 +2617,9 @@ def : Pat <
>>>
>>>  // Prevent expanding both fneg and fabs.
>>>
>>> -// FIXME: Should use S_OR_B32
>>>  def : Pat <
>>>    (fneg (fabs f32:$src)),
>>> -  (V_OR_B32_e32 $src, (V_MOV_B32_e32 0x80000000)) /* Set sign bit */
>>> +  (S_OR_B32 $src, 0x80000000) /* Set sign bit */
>>>  >;
>>
>> BTW, shouldn't this really use XOR to toggle the sign bit? (Speaking as
>> the one who added the V_OR_B32 implementation :)
>
> D'oh, sorry, I only saw the fneg and missed the fabs. :(
>
> Could the fabs-only and fneg-only patterns use S_AND_B32 and S_XOR_B32
> as well?

Yes, I think all of those should use scalar opcodes, even double opcodes.

Marek