[llvm-dev] tracking known operand bits across passes

[Smith, Kevin B via llvm-commits]

Steve,

I have a pass that can do what you want, but not by computing or using known bits.  I intend to try to upstream this
for X86 CG. It is what I developed to problems with movw, and movb causing false depenences and some performance
loss.

It works by looking for byte and word operations that might be more profitably done either using movz(wb)l or by simply making
the instruction larger.  But it does this not by knowing bits are zero or one, but by making sure the upper bits of the register are
unused/dead.

It could definitely do this for andw ->andl without much trouble at all.

Kevin Smith

-----Original Message-----
From: llvm-dev [mailto:llvm-dev-bounces at lists.llvm.org] On Behalf Of Steve King via llvm-dev
Sent: Wednesday, October 28, 2015 11:59 AM
To: llvm-dev
Subject: [llvm-dev] tracking known operand bits across passes

Hello LLVM,

tl;dr:  Is there a reasonable way to track known operand bits all the
way to a pre-emit pass?

Long version:

For code size optimization, targets like x86 could use operand
known-zero and known-one bits.  For example, a 16-bit 'andw' can be
promoted to a cheaper 32-bit 'andl' so long as an operand has amenable
zero bits.

So far, experiments making this work in my own target have failed.

During lowering, DAG.computeKnownBits() tells me what I need to know.
I can promote the operation here and add a leading zero-extend and
trailing truncate.  Subsequent DAG processing just strips ext/trunc
back off, leaving me with the original node again and in an endless
lowering loop.

Since the promotion is really an encoding trick, not a logical change
to the program, perhaps the best place to promote an andw to andl is
in a late pre-emit pass.  Is that reasonable and can anyone outline
the right approach?

Thanks,
-steve
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