[PATCH] D13390: SCEV: handle constant condition for select/branch

[hfinkel@anl.gov via llvm-commits]

hfinkel added a comment.

In http://reviews.llvm.org/D13390#276849, @joker.eph wrote:

> We surely catch it elsewhere. The problem is loop optimization like induction variable substitution that will operate on the inner loop, exposes this case, and then move the outer loop leaving the IR in this state. To solve this with simpifycfg I'm not sure that   1) it can be ran on a subpart of the CFG (you don't want to reprocess the full function between the two loops) 2) won't mess up the loop structure/canonicalization.
>
> It seems to me that there is a kind of tension between optimizing for the "canonical IR" and being able to handle properly "non-canonical IR" because it is hard or expensive to always guarantee that your IR is canonical. I see this change as pushing a little bit SCEV toward the second case.
>
> Any opinion?


This is certainly true; there will always be these kinds of phase ordering problems. Especially since we don't have a LoopSimplifyCFG pass ;)

> Note: this landed a few week ago in r249431.



http://reviews.llvm.org/D13390