[PATCH] D14079: [FPEnv Core 14/14] Introduce F*_W_CHAIN instrs to prevent reordering

[Sergey Dmitrouk via llvm-commits]

sdmitrouk added inline comments.

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Comment at: lib/Target/NVPTX/NVPTXInstrInfo.td:696
@@ -695,1 +695,3 @@
 defm FMUL : F3<"mul", fmul>;
+defm FADD_wchain : F3<"add", faddwchain>;
+defm FSUB_wchain : F3<"sub", fsubwchain>;
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jholewinski wrote:
> Does it matter if the target does not actually support FP exceptions?  This is not currently modeled in PTX.
> Does it matter if the target does not actually support FP exceptions? This is not currently modeled in PTX.

Not really, this only fixes ordering of FP instructions, everything else (i.e., changes in floating-point state registers) is left for future improvements. I just wanted to ensure that new instructions won't cause selection failures on supported targets, but if you think this is useless for PTX or other targets I can remove these changes.


Repository:
  rL LLVM

http://reviews.llvm.org/D14079