[PATCH] D13943: AVX-512: Fixed a bug in "select" operation for i1 type

[Elena Demikhovsky via llvm-commits]

delena created this revision.
delena added a reviewer: igorb.
delena added a subscriber: llvm-commits.
delena set the repository for this revision to rL LLVM.

A test failed on AVX-512, 32-bit target with 
LLVM ERROR: Cannot select: t33: i1 = select_cc t25, Constant:i32<0>, t45, t42, seteq:ch


Repository:
  rL LLVM

http://reviews.llvm.org/D13943

Files:
  ../lib/Target/X86/X86ISelLowering.cpp
  ../test/CodeGen/X86/avx512-cmp.ll

Index: ../test/CodeGen/X86/avx512-cmp.ll
===================================================================
--- ../test/CodeGen/X86/avx512-cmp.ll
+++ ../test/CodeGen/X86/avx512-cmp.ll
@@ -1,4 +1,5 @@
 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl --show-mc-encoding | FileCheck %s
+; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=knl | FileCheck %s --check-prefix AVX512-32
 
 ; CHECK-LABEL: test1
 ; CHECK: vucomisd {{.*}}encoding: [0x62
@@ -99,3 +100,26 @@
 B:
  ret i32 7
 }
+
+; AVX512-32-LABEL: test10
+; AVX512-32: movl    4(%esp), %ecx
+; AVX512-32: cmpl    $9, (%ecx)
+; AVX512-32: seta    %al
+; AVX512-32: cmpl    $0, 4(%ecx)
+; AVX512-32: setg    %cl
+; AVX512-32: je
+; AVX512-32: movb    %cl, %al
+; AVX512-32: testb   $1, %al
+
+define void @test10(i64* %i.addr)  {
+
+  %x = load i64, i64* %i.addr, align 8
+  %cmp = icmp slt i64 %x, 10
+  br i1 %cmp, label %true, label %false
+
+true:
+  ret void
+
+false:
+  ret void
+}
\ No newline at end of file
Index: ../lib/Target/X86/X86ISelLowering.cpp
===================================================================
--- ../lib/Target/X86/X86ISelLowering.cpp
+++ ../lib/Target/X86/X86ISelLowering.cpp
@@ -1328,6 +1328,7 @@
 
     setOperationAction(ISD::BR_CC,              MVT::i1,    Expand);
     setOperationAction(ISD::SETCC,              MVT::i1,    Custom);
+    setOperationAction(ISD::SELECT_CC,          MVT::i1,    Expand);
     setOperationAction(ISD::XOR,                MVT::i1,    Legal);
     setOperationAction(ISD::OR,                 MVT::i1,    Legal);
     setOperationAction(ISD::AND,                MVT::i1,    Legal);


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