[PATCH] D13924: AMDGPU: Hack for VS_32 register pressure

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Tue Oct 20 17:55:35 PDT 2015


arsenm created this revision.
arsenm added a reviewer: tstellarAMD.
arsenm added a subscriber: llvm-commits.
Herald added a subscriber: arsenm.

For some reason VS_32 ends up factoring into the pressure heuristics
even though we should never see a virtual register with this class.
    
When SGPRs are reserved for register spilling, this for some reason
triggers reg-crit scheduling.
    
Setting isAllocatable = 0 may help with this since that seems to remove
it from the default implementation's generated table.

http://reviews.llvm.org/D13924

Files:
  lib/Target/AMDGPU/SIRegisterInfo.cpp
  lib/Target/AMDGPU/SIRegisterInfo.h
  test/CodeGen/AMDGPU/salu-to-valu.ll
  test/CodeGen/AMDGPU/valu-i1.ll

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