[llvm] r250713 - Revert "RegisterPressure: allocatable physreg uses are always kills"
Matthias Braun via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 19 10:44:23 PDT 2015
Author: matze
Date: Mon Oct 19 12:44:22 2015
New Revision: 250713
URL: http://llvm.org/viewvc/llvm-project?rev=250713&view=rev
Log:
Revert "RegisterPressure: allocatable physreg uses are always kills"
This reverts commit r250596.
Reverted for now as the commit triggers assert in the AMDGPU target
pending investigation.
Modified:
llvm/trunk/include/llvm/CodeGen/RegisterPressure.h
llvm/trunk/lib/CodeGen/RegisterPressure.cpp
Modified: llvm/trunk/include/llvm/CodeGen/RegisterPressure.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/RegisterPressure.h?rev=250713&r1=250712&r2=250713&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/RegisterPressure.h (original)
+++ llvm/trunk/include/llvm/CodeGen/RegisterPressure.h Mon Oct 19 12:44:22 2015
@@ -444,8 +444,6 @@ public:
protected:
const LiveRange *getLiveRange(unsigned Reg) const;
- bool isLastUse(unsigned VRegOrUnit, SlotIndex Pos) const;
-
void increaseRegPressure(ArrayRef<unsigned> Regs);
void decreaseRegPressure(ArrayRef<unsigned> Regs);
Modified: llvm/trunk/lib/CodeGen/RegisterPressure.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegisterPressure.cpp?rev=250713&r1=250712&r2=250713&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegisterPressure.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegisterPressure.cpp Mon Oct 19 12:44:22 2015
@@ -568,17 +568,6 @@ bool RegPressureTracker::recede(SmallVec
return true;
}
-bool RegPressureTracker::isLastUse(unsigned VRegOrUnit, SlotIndex Pos) const {
- // Allocatable physregs are always single-use before register rewriting.
- if (!TargetRegisterInfo::isVirtualRegister(VRegOrUnit))
- return true;
- // Without liveness information we conservatively assume "no last use".
- if (!RequireIntervals)
- return false;
- const LiveRange *LR = getLiveRange(VRegOrUnit);
- return LR && LR->Query(Pos).isKill();
-}
-
/// Advance across the current instruction.
bool RegPressureTracker::advance() {
assert(!TrackUntiedDefs && "unsupported mode");
@@ -613,15 +602,21 @@ bool RegPressureTracker::advance() {
if (!isLive)
discoverLiveIn(Reg);
// Kill liveness at last uses.
- if (isLastUse(Reg, SlotIdx)) {
- if (isLive) {
- LiveRegs.erase(Reg);
- decreaseRegPressure(Reg);
- }
- } else if(!isLive) {
- // We discovered a live which was not last used here, adjust pressure.
- increaseRegPressure(Reg);
+ bool lastUse = false;
+ if (RequireIntervals) {
+ const LiveRange *LR = getLiveRange(Reg);
+ lastUse = LR && LR->Query(SlotIdx).isKill();
+ }
+ else {
+ // Allocatable physregs are always single-use before register rewriting.
+ lastUse = !TargetRegisterInfo::isVirtualRegister(Reg);
+ }
+ if (lastUse && isLive) {
+ LiveRegs.erase(Reg);
+ decreaseRegPressure(Reg);
}
+ else if (!lastUse && !isLive)
+ increaseRegPressure(Reg);
}
// Generate liveness for defs.
@@ -936,18 +931,21 @@ void RegPressureTracker::bumpDownwardPre
for (unsigned i = 0, e = RegOpers.Uses.size(); i < e; ++i) {
unsigned Reg = RegOpers.Uses[i];
- bool IsLastUse = isLastUse(Reg, SlotIdx);
- // We had a last use at MIs position. To know the situation for the current
- // position we have to check if there exist other uses in between.
- if (IsLastUse && TargetRegisterInfo::isVirtualRegister(Reg)) {
- SlotIndex CurrIdx = getCurrSlot();
+ if (RequireIntervals) {
// FIXME: allow the caller to pass in the list of vreg uses that remain
// to be bottom-scheduled to avoid searching uses at each query.
- if (findUseBetween(Reg, CurrIdx, SlotIdx, *MRI, LIS))
- IsLastUse = false;
+ SlotIndex CurrIdx = getCurrSlot();
+ const LiveRange *LR = getLiveRange(Reg);
+ if (LR) {
+ LiveQueryResult LRQ = LR->Query(SlotIdx);
+ if (LRQ.isKill() && !findUseBetween(Reg, CurrIdx, SlotIdx, *MRI, LIS))
+ decreaseRegPressure(Reg);
+ }
}
- if (IsLastUse)
+ else if (!TargetRegisterInfo::isVirtualRegister(Reg)) {
+ // Allocatable physregs are always single-use before register rewriting.
decreaseRegPressure(Reg);
+ }
}
// Generate liveness for defs.
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