[llvm] r250642 - Make a bunch of static arrays const.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Sat Oct 17 22:15:35 PDT 2015
Author: ctopper
Date: Sun Oct 18 00:15:34 2015
New Revision: 250642
URL: http://llvm.org/viewvc/llvm-project?rev=250642&view=rev
Log:
Make a bunch of static arrays const.
Modified:
llvm/trunk/lib/Fuzzer/FuzzerDriver.cpp
llvm/trunk/lib/IR/AutoUpgrade.cpp
llvm/trunk/lib/Support/Windows/Path.inc
llvm/trunk/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
llvm/trunk/lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp
llvm/trunk/lib/Target/AMDGPU/AMDGPUInstrInfo.cpp
llvm/trunk/lib/Target/AMDGPU/SIRegisterInfo.cpp
llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.cpp
llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCDuplexInfo.cpp
llvm/trunk/lib/Target/Mips/Mips16HardFloat.cpp
llvm/trunk/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
llvm/trunk/lib/Target/TargetRecip.cpp
llvm/trunk/lib/Target/XCore/Disassembler/XCoreDisassembler.cpp
llvm/trunk/tools/llvm-readobj/ARMAttributeParser.cpp
Modified: llvm/trunk/lib/Fuzzer/FuzzerDriver.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Fuzzer/FuzzerDriver.cpp?rev=250642&r1=250641&r2=250642&view=diff
==============================================================================
--- llvm/trunk/lib/Fuzzer/FuzzerDriver.cpp (original)
+++ llvm/trunk/lib/Fuzzer/FuzzerDriver.cpp Sun Oct 18 00:15:34 2015
@@ -42,7 +42,7 @@ struct {
#undef FUZZER_FLAG_STRING
} Flags;
-static FlagDescription FlagDescriptions [] {
+static const FlagDescription FlagDescriptions [] {
#define FUZZER_FLAG_INT(Name, Default, Description) \
{ #Name, Description, Default, &Flags.Name, nullptr},
#define FUZZER_FLAG_STRING(Name, Description) \
Modified: llvm/trunk/lib/IR/AutoUpgrade.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/IR/AutoUpgrade.cpp?rev=250642&r1=250641&r2=250642&view=diff
==============================================================================
--- llvm/trunk/lib/IR/AutoUpgrade.cpp (original)
+++ llvm/trunk/lib/IR/AutoUpgrade.cpp Sun Oct 18 00:15:34 2015
@@ -106,14 +106,15 @@ static bool UpgradeIntrinsicFunction1(Fu
}
Regex vstRegex("^arm\\.neon\\.vst([1234]|[234]lane)\\.v[a-z0-9]*$");
if (vstRegex.match(Name)) {
- static Intrinsic::ID StoreInts[] = {Intrinsic::arm_neon_vst1,
- Intrinsic::arm_neon_vst2,
- Intrinsic::arm_neon_vst3,
- Intrinsic::arm_neon_vst4};
+ static const Intrinsic::ID StoreInts[] = {Intrinsic::arm_neon_vst1,
+ Intrinsic::arm_neon_vst2,
+ Intrinsic::arm_neon_vst3,
+ Intrinsic::arm_neon_vst4};
- static Intrinsic::ID StoreLaneInts[] = {Intrinsic::arm_neon_vst2lane,
- Intrinsic::arm_neon_vst3lane,
- Intrinsic::arm_neon_vst4lane};
+ static const Intrinsic::ID StoreLaneInts[] = {
+ Intrinsic::arm_neon_vst2lane, Intrinsic::arm_neon_vst3lane,
+ Intrinsic::arm_neon_vst4lane
+ };
auto fArgs = F->getFunctionType()->params();
Type *Tys[] = {fArgs[0], fArgs[1]};
Modified: llvm/trunk/lib/Support/Windows/Path.inc
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Windows/Path.inc?rev=250642&r1=250641&r2=250642&view=diff
==============================================================================
--- llvm/trunk/lib/Support/Windows/Path.inc (original)
+++ llvm/trunk/lib/Support/Windows/Path.inc Sun Oct 18 00:15:34 2015
@@ -348,10 +348,12 @@ std::error_code equivalent(const Twine &
static bool isReservedName(StringRef path) {
// This list of reserved names comes from MSDN, at:
// http://msdn.microsoft.com/en-us/library/aa365247%28v=vs.85%29.aspx
- static const char *sReservedNames[] = { "nul", "con", "prn", "aux",
- "com1", "com2", "com3", "com4", "com5", "com6",
- "com7", "com8", "com9", "lpt1", "lpt2", "lpt3",
- "lpt4", "lpt5", "lpt6", "lpt7", "lpt8", "lpt9" };
+ static const char *const sReservedNames[] = { "nul", "con", "prn", "aux",
+ "com1", "com2", "com3", "com4",
+ "com5", "com6", "com7", "com8",
+ "com9", "lpt1", "lpt2", "lpt3",
+ "lpt4", "lpt5", "lpt6", "lpt7",
+ "lpt8", "lpt9" };
// First, check to see if this is a device namespace, which always
// starts with \\.\, since device namespaces are not legal file paths.
Modified: llvm/trunk/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp?rev=250642&r1=250641&r2=250642&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp Sun Oct 18 00:15:34 2015
@@ -1282,8 +1282,8 @@ SDNode *AArch64DAGToDAGISel::SelectLoadL
SDValue SuperReg = SDValue(Ld, 0);
EVT WideVT = RegSeq.getOperand(1)->getValueType(0);
- static unsigned QSubs[] = { AArch64::qsub0, AArch64::qsub1, AArch64::qsub2,
- AArch64::qsub3 };
+ static const unsigned QSubs[] = { AArch64::qsub0, AArch64::qsub1,
+ AArch64::qsub2, AArch64::qsub3 };
for (unsigned i = 0; i < NumVecs; ++i) {
SDValue NV = CurDAG->getTargetExtractSubreg(QSubs[i], dl, WideVT, SuperReg);
if (Narrow)
@@ -1335,8 +1335,8 @@ SDNode *AArch64DAGToDAGISel::SelectPostL
Narrow ? NarrowVector(SuperReg, *CurDAG) : SuperReg);
} else {
EVT WideVT = RegSeq.getOperand(1)->getValueType(0);
- static unsigned QSubs[] = { AArch64::qsub0, AArch64::qsub1, AArch64::qsub2,
- AArch64::qsub3 };
+ static const unsigned QSubs[] = { AArch64::qsub0, AArch64::qsub1,
+ AArch64::qsub2, AArch64::qsub3 };
for (unsigned i = 0; i < NumVecs; ++i) {
SDValue NV = CurDAG->getTargetExtractSubreg(QSubs[i], dl, WideVT,
SuperReg);
Modified: llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp?rev=250642&r1=250641&r2=250642&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp Sun Oct 18 00:15:34 2015
@@ -1186,8 +1186,10 @@ public:
template <unsigned NumRegs>
void addVectorList64Operands(MCInst &Inst, unsigned N) const {
assert(N == 1 && "Invalid number of operands!");
- static unsigned FirstRegs[] = { AArch64::D0, AArch64::D0_D1,
- AArch64::D0_D1_D2, AArch64::D0_D1_D2_D3 };
+ static const unsigned FirstRegs[] = { AArch64::D0,
+ AArch64::D0_D1,
+ AArch64::D0_D1_D2,
+ AArch64::D0_D1_D2_D3 };
unsigned FirstReg = FirstRegs[NumRegs - 1];
Inst.addOperand(
@@ -1197,8 +1199,10 @@ public:
template <unsigned NumRegs>
void addVectorList128Operands(MCInst &Inst, unsigned N) const {
assert(N == 1 && "Invalid number of operands!");
- static unsigned FirstRegs[] = { AArch64::Q0, AArch64::Q0_Q1,
- AArch64::Q0_Q1_Q2, AArch64::Q0_Q1_Q2_Q3 };
+ static const unsigned FirstRegs[] = { AArch64::Q0,
+ AArch64::Q0_Q1,
+ AArch64::Q0_Q1_Q2,
+ AArch64::Q0_Q1_Q2_Q3 };
unsigned FirstReg = FirstRegs[NumRegs - 1];
Inst.addOperand(
Modified: llvm/trunk/lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp?rev=250642&r1=250641&r2=250642&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp Sun Oct 18 00:15:34 2015
@@ -269,7 +269,7 @@ struct LdStNInstrDesc {
int NaturalOffset;
};
-static LdStNInstrDesc LdStNInstInfo[] = {
+static const LdStNInstrDesc LdStNInstInfo[] = {
{ AArch64::LD1i8, "ld1", ".b", 1, true, 0 },
{ AArch64::LD1i16, "ld1", ".h", 1, true, 0 },
{ AArch64::LD1i32, "ld1", ".s", 1, true, 0 },
@@ -612,7 +612,7 @@ static LdStNInstrDesc LdStNInstInfo[] =
{ AArch64::ST4Fourv2s_POST, "st4", ".2s", 1, false, 32 },
};
-static LdStNInstrDesc *getLdStNInstrDesc(unsigned Opcode) {
+static const LdStNInstrDesc *getLdStNInstrDesc(unsigned Opcode) {
unsigned Idx;
for (Idx = 0; Idx != array_lengthof(LdStNInstInfo); ++Idx)
if (LdStNInstInfo[Idx].Opcode == Opcode)
@@ -641,7 +641,7 @@ void AArch64AppleInstPrinter::printInst(
return;
}
- if (LdStNInstrDesc *LdStDesc = getLdStNInstrDesc(Opcode)) {
+ if (const LdStNInstrDesc *LdStDesc = getLdStNInstrDesc(Opcode)) {
O << "\t" << LdStDesc->Mnemonic << LdStDesc->Layout << '\t';
// Now onto the operands: first a vector list with possible lane
Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPUInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPUInstrInfo.cpp?rev=250642&r1=250641&r2=250642&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPUInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPUInstrInfo.cpp Sun Oct 18 00:15:34 2015
@@ -367,7 +367,7 @@ int AMDGPUInstrInfo::pseudoToMCOpcode(in
ArrayRef<std::pair<int, const char *>>
AMDGPUInstrInfo::getSerializableTargetIndices() const {
- static std::pair<int, const char *> TargetIndices[] = {
+ static const std::pair<int, const char *> TargetIndices[] = {
{AMDGPU::TI_CONSTDATA_START, "amdgpu-constdata-start"},
{AMDGPU::TI_SCRATCH_RSRC_DWORD0, "amdgpu-scratch-rsrc-dword0"},
{AMDGPU::TI_SCRATCH_RSRC_DWORD1, "amdgpu-scratch-rsrc-dword1"},
Modified: llvm/trunk/lib/Target/AMDGPU/SIRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SIRegisterInfo.cpp?rev=250642&r1=250641&r2=250642&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/SIRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/SIRegisterInfo.cpp Sun Oct 18 00:15:34 2015
@@ -331,7 +331,7 @@ unsigned SIRegisterInfo::getHWRegIndex(u
const TargetRegisterClass *SIRegisterInfo::getPhysRegClass(unsigned Reg) const {
assert(!TargetRegisterInfo::isVirtualRegister(Reg));
- static const TargetRegisterClass *BaseClasses[] = {
+ static const TargetRegisterClass *const BaseClasses[] = {
&AMDGPU::VGPR_32RegClass,
&AMDGPU::SReg_32RegClass,
&AMDGPU::VReg_64RegClass,
Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=250642&r1=250641&r2=250642&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Sun Oct 18 00:15:34 2015
@@ -11926,9 +11926,9 @@ bool ARMTargetLowering::lowerInterleaved
SubVecTy = VectorType::get(IntTy, NumSubElts);
}
- static Intrinsic::ID StoreInts[3] = {Intrinsic::arm_neon_vst2,
- Intrinsic::arm_neon_vst3,
- Intrinsic::arm_neon_vst4};
+ static const Intrinsic::ID StoreInts[3] = {Intrinsic::arm_neon_vst2,
+ Intrinsic::arm_neon_vst3,
+ Intrinsic::arm_neon_vst4};
SmallVector<Value *, 6> Ops;
Type *Int8Ptr = Builder.getInt8PtrTy(SI->getPointerAddressSpace());
Modified: llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.cpp?rev=250642&r1=250641&r2=250642&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.cpp Sun Oct 18 00:15:34 2015
@@ -1476,7 +1476,7 @@ HexagonTargetLowering::HexagonTargetLowe
// Set the action for vector operations to "expand", then override it with
// either "custom" or "legal" for specific cases.
- static unsigned VectExpOps[] = {
+ static const unsigned VectExpOps[] = {
// Integer arithmetic:
ISD::ADD, ISD::SUB, ISD::MUL, ISD::SDIV, ISD::UDIV,
ISD::SREM, ISD::UREM, ISD::SDIVREM, ISD::UDIVREM, ISD::ADDC,
Modified: llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCDuplexInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCDuplexInfo.cpp?rev=250642&r1=250641&r2=250642&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCDuplexInfo.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCDuplexInfo.cpp Sun Oct 18 00:15:34 2015
@@ -26,7 +26,7 @@ using namespace Hexagon;
#define DEBUG_TYPE "hexagon-mcduplex-info"
// pair table of subInstructions with opcodes
-static std::pair<unsigned, unsigned> opcodeData[] = {
+static const std::pair<unsigned, unsigned> opcodeData[] = {
std::make_pair((unsigned)V4_SA1_addi, 0),
std::make_pair((unsigned)V4_SA1_addrx, 6144),
std::make_pair((unsigned)V4_SA1_addsp, 3072),
Modified: llvm/trunk/lib/Target/Mips/Mips16HardFloat.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/Mips16HardFloat.cpp?rev=250642&r1=250641&r2=250642&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/Mips16HardFloat.cpp (original)
+++ llvm/trunk/lib/Target/Mips/Mips16HardFloat.cpp Sun Oct 18 00:15:34 2015
@@ -343,7 +343,7 @@ static void assureFPCallStub(Function &F
//
// Functions that are llvm intrinsics and don't need helpers.
//
-static const char *IntrinsicInline[] = {
+static const char *const IntrinsicInline[] = {
"fabs", "fabsf",
"llvm.ceil.f32", "llvm.ceil.f64",
"llvm.copysign.f32", "llvm.copysign.f64",
@@ -395,7 +395,7 @@ static bool fixupFPReturnAndCall(Functio
Type *T = RVal->getType();
FPReturnVariant RV = whichFPReturnVariant(T);
if (RV == NoFPRet) continue;
- static const char* Helper[NoFPRet] = {
+ static const char *const Helper[NoFPRet] = {
"__mips16_ret_sf", "__mips16_ret_df", "__mips16_ret_sc",
"__mips16_ret_dc"
};
Modified: llvm/trunk/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp?rev=250642&r1=250641&r2=250642&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp Sun Oct 18 00:15:34 2015
@@ -98,7 +98,7 @@ public:
};
- static unsigned IntRegs[32] = {
+ static const unsigned IntRegs[32] = {
Sparc::G0, Sparc::G1, Sparc::G2, Sparc::G3,
Sparc::G4, Sparc::G5, Sparc::G6, Sparc::G7,
Sparc::O0, Sparc::O1, Sparc::O2, Sparc::O3,
@@ -108,7 +108,7 @@ public:
Sparc::I0, Sparc::I1, Sparc::I2, Sparc::I3,
Sparc::I4, Sparc::I5, Sparc::I6, Sparc::I7 };
- static unsigned FloatRegs[32] = {
+ static const unsigned FloatRegs[32] = {
Sparc::F0, Sparc::F1, Sparc::F2, Sparc::F3,
Sparc::F4, Sparc::F5, Sparc::F6, Sparc::F7,
Sparc::F8, Sparc::F9, Sparc::F10, Sparc::F11,
@@ -118,7 +118,7 @@ public:
Sparc::F24, Sparc::F25, Sparc::F26, Sparc::F27,
Sparc::F28, Sparc::F29, Sparc::F30, Sparc::F31 };
- static unsigned DoubleRegs[32] = {
+ static const unsigned DoubleRegs[32] = {
Sparc::D0, Sparc::D1, Sparc::D2, Sparc::D3,
Sparc::D4, Sparc::D5, Sparc::D6, Sparc::D7,
Sparc::D8, Sparc::D7, Sparc::D8, Sparc::D9,
@@ -128,13 +128,13 @@ public:
Sparc::D24, Sparc::D25, Sparc::D26, Sparc::D27,
Sparc::D28, Sparc::D29, Sparc::D30, Sparc::D31 };
- static unsigned QuadFPRegs[32] = {
+ static const unsigned QuadFPRegs[32] = {
Sparc::Q0, Sparc::Q1, Sparc::Q2, Sparc::Q3,
Sparc::Q4, Sparc::Q5, Sparc::Q6, Sparc::Q7,
Sparc::Q8, Sparc::Q9, Sparc::Q10, Sparc::Q11,
Sparc::Q12, Sparc::Q13, Sparc::Q14, Sparc::Q15 };
- static unsigned ASRRegs[32] = {
+ static const unsigned ASRRegs[32] = {
SP::Y, SP::ASR1, SP::ASR2, SP::ASR3,
SP::ASR4, SP::ASR5, SP::ASR6, SP::ASR7,
SP::ASR8, SP::ASR9, SP::ASR10, SP::ASR11,
@@ -144,7 +144,7 @@ public:
SP::ASR24, SP::ASR25, SP::ASR26, SP::ASR27,
SP::ASR28, SP::ASR29, SP::ASR30, SP::ASR31};
- static unsigned IntPairRegs[] = {
+ static const unsigned IntPairRegs[] = {
Sparc::G0_G1, Sparc::G2_G3, Sparc::G4_G5, Sparc::G6_G7,
Sparc::O0_O1, Sparc::O2_O3, Sparc::O4_O5, Sparc::O6_O7,
Sparc::L0_L1, Sparc::L2_L3, Sparc::L4_L5, Sparc::L6_L7,
Modified: llvm/trunk/lib/Target/TargetRecip.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetRecip.cpp?rev=250642&r1=250641&r2=250642&view=diff
==============================================================================
--- llvm/trunk/lib/Target/TargetRecip.cpp (original)
+++ llvm/trunk/lib/Target/TargetRecip.cpp Sun Oct 18 00:15:34 2015
@@ -26,7 +26,7 @@ using namespace llvm;
// the key strings for queries and command-line inputs.
// In addition, the command-line interface recognizes the global parameters
// "all", "none", and "default".
-static const char *RecipOps[] = {
+static const char *const RecipOps[] = {
"divd",
"divf",
"vec-divd",
Modified: llvm/trunk/lib/Target/XCore/Disassembler/XCoreDisassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/Disassembler/XCoreDisassembler.cpp?rev=250642&r1=250641&r2=250642&view=diff
==============================================================================
--- llvm/trunk/lib/Target/XCore/Disassembler/XCoreDisassembler.cpp (original)
+++ llvm/trunk/lib/Target/XCore/Disassembler/XCoreDisassembler.cpp Sun Oct 18 00:15:34 2015
@@ -224,7 +224,7 @@ static DecodeStatus DecodeBitpOperand(MC
uint64_t Address, const void *Decoder) {
if (Val > 11)
return MCDisassembler::Fail;
- static unsigned Values[] = {
+ static const unsigned Values[] = {
32 /*bpw*/, 1, 2, 3, 4, 5, 6, 7, 8, 16, 24, 32
};
Inst.addOperand(MCOperand::createImm(Values[Val]));
Modified: llvm/trunk/tools/llvm-readobj/ARMAttributeParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-readobj/ARMAttributeParser.cpp?rev=250642&r1=250641&r2=250642&view=diff
==============================================================================
--- llvm/trunk/tools/llvm-readobj/ARMAttributeParser.cpp (original)
+++ llvm/trunk/tools/llvm-readobj/ARMAttributeParser.cpp Sun Oct 18 00:15:34 2015
@@ -118,7 +118,7 @@ void ARMAttributeParser::PrintAttribute(
void ARMAttributeParser::CPU_arch(AttrType Tag, const uint8_t *Data,
uint32_t &Offset) {
- static const char *Strings[] = {
+ static const char *const Strings[] = {
"Pre-v4", "ARM v4", "ARM v4T", "ARM v5T", "ARM v5TE", "ARM v5TEJ", "ARM v6",
"ARM v6KZ", "ARM v6T2", "ARM v6K", "ARM v7", "ARM v6-M", "ARM v6S-M",
"ARM v7E-M", "ARM v8"
@@ -149,7 +149,7 @@ void ARMAttributeParser::CPU_arch_profil
void ARMAttributeParser::ARM_ISA_use(AttrType Tag, const uint8_t *Data,
uint32_t &Offset) {
- static const char *Strings[] = { "Not Permitted", "Permitted" };
+ static const char *const Strings[] = { "Not Permitted", "Permitted" };
uint64_t Value = ParseInteger(Data, Offset);
StringRef ValueDesc =
@@ -159,7 +159,7 @@ void ARMAttributeParser::ARM_ISA_use(Att
void ARMAttributeParser::THUMB_ISA_use(AttrType Tag, const uint8_t *Data,
uint32_t &Offset) {
- static const char *Strings[] = { "Not Permitted", "Thumb-1", "Thumb-2" };
+ static const char *const Strings[] = { "Not Permitted", "Thumb-1", "Thumb-2" };
uint64_t Value = ParseInteger(Data, Offset);
StringRef ValueDesc =
@@ -169,7 +169,7 @@ void ARMAttributeParser::THUMB_ISA_use(A
void ARMAttributeParser::FP_arch(AttrType Tag, const uint8_t *Data,
uint32_t &Offset) {
- static const char *Strings[] = {
+ static const char *const Strings[] = {
"Not Permitted", "VFPv1", "VFPv2", "VFPv3", "VFPv3-D16", "VFPv4",
"VFPv4-D16", "ARMv8-a FP", "ARMv8-a FP-D16"
};
@@ -182,7 +182,7 @@ void ARMAttributeParser::FP_arch(AttrTyp
void ARMAttributeParser::WMMX_arch(AttrType Tag, const uint8_t *Data,
uint32_t &Offset) {
- static const char *Strings[] = { "Not Permitted", "WMMXv1", "WMMXv2" };
+ static const char *const Strings[] = { "Not Permitted", "WMMXv1", "WMMXv2" };
uint64_t Value = ParseInteger(Data, Offset);
StringRef ValueDesc =
@@ -192,7 +192,7 @@ void ARMAttributeParser::WMMX_arch(AttrT
void ARMAttributeParser::Advanced_SIMD_arch(AttrType Tag, const uint8_t *Data,
uint32_t &Offset) {
- static const char *Strings[] = {
+ static const char *const Strings[] = {
"Not Permitted", "NEONv1", "NEONv2+FMA", "ARMv8-a NEON", "ARMv8.1-a NEON"
};
@@ -204,7 +204,7 @@ void ARMAttributeParser::Advanced_SIMD_a
void ARMAttributeParser::PCS_config(AttrType Tag, const uint8_t *Data,
uint32_t &Offset) {
- static const char *Strings[] = {
+ static const char *const Strings[] = {
"None", "Bare Platform", "Linux Application", "Linux DSO", "Palm OS 2004",
"Reserved (Palm OS)", "Symbian OS 2004", "Reserved (Symbian OS)"
};
@@ -217,7 +217,7 @@ void ARMAttributeParser::PCS_config(Attr
void ARMAttributeParser::ABI_PCS_R9_use(AttrType Tag, const uint8_t *Data,
uint32_t &Offset) {
- static const char *Strings[] = { "v6", "Static Base", "TLS", "Unused" };
+ static const char *const Strings[] = { "v6", "Static Base", "TLS", "Unused" };
uint64_t Value = ParseInteger(Data, Offset);
StringRef ValueDesc =
@@ -227,7 +227,7 @@ void ARMAttributeParser::ABI_PCS_R9_use(
void ARMAttributeParser::ABI_PCS_RW_data(AttrType Tag, const uint8_t *Data,
uint32_t &Offset) {
- static const char *Strings[] = {
+ static const char *const Strings[] = {
"Absolute", "PC-relative", "SB-relative", "Not Permitted"
};
@@ -239,7 +239,9 @@ void ARMAttributeParser::ABI_PCS_RW_data
void ARMAttributeParser::ABI_PCS_RO_data(AttrType Tag, const uint8_t *Data,
uint32_t &Offset) {
- static const char *Strings[] = { "Absolute", "PC-relative", "Not Permitted" };
+ static const char *const Strings[] = {
+ "Absolute", "PC-relative", "Not Permitted"
+ };
uint64_t Value = ParseInteger(Data, Offset);
StringRef ValueDesc =
@@ -249,7 +251,9 @@ void ARMAttributeParser::ABI_PCS_RO_data
void ARMAttributeParser::ABI_PCS_GOT_use(AttrType Tag, const uint8_t *Data,
uint32_t &Offset) {
- static const char *Strings[] = { "Not Permitted", "Direct", "GOT-Indirect" };
+ static const char *const Strings[] = {
+ "Not Permitted", "Direct", "GOT-Indirect"
+ };
uint64_t Value = ParseInteger(Data, Offset);
StringRef ValueDesc =
@@ -259,7 +263,7 @@ void ARMAttributeParser::ABI_PCS_GOT_use
void ARMAttributeParser::ABI_PCS_wchar_t(AttrType Tag, const uint8_t *Data,
uint32_t &Offset) {
- static const char *Strings[] = {
+ static const char *const Strings[] = {
"Not Permitted", "Unknown", "2-byte", "Unknown", "4-byte"
};
@@ -271,7 +275,7 @@ void ARMAttributeParser::ABI_PCS_wchar_t
void ARMAttributeParser::ABI_FP_rounding(AttrType Tag, const uint8_t *Data,
uint32_t &Offset) {
- static const char *Strings[] = { "IEEE-754", "Runtime" };
+ static const char *const Strings[] = { "IEEE-754", "Runtime" };
uint64_t Value = ParseInteger(Data, Offset);
StringRef ValueDesc =
@@ -281,7 +285,9 @@ void ARMAttributeParser::ABI_FP_rounding
void ARMAttributeParser::ABI_FP_denormal(AttrType Tag, const uint8_t *Data,
uint32_t &Offset) {
- static const char *Strings[] = { "Unsupported", "IEEE-754", "Sign Only" };
+ static const char *const Strings[] = {
+ "Unsupported", "IEEE-754", "Sign Only"
+ };
uint64_t Value = ParseInteger(Data, Offset);
StringRef ValueDesc =
@@ -291,7 +297,7 @@ void ARMAttributeParser::ABI_FP_denormal
void ARMAttributeParser::ABI_FP_exceptions(AttrType Tag, const uint8_t *Data,
uint32_t &Offset) {
- static const char *Strings[] = { "Not Permitted", "IEEE-754" };
+ static const char *const Strings[] = { "Not Permitted", "IEEE-754" };
uint64_t Value = ParseInteger(Data, Offset);
StringRef ValueDesc =
@@ -302,7 +308,7 @@ void ARMAttributeParser::ABI_FP_exceptio
void ARMAttributeParser::ABI_FP_user_exceptions(AttrType Tag,
const uint8_t *Data,
uint32_t &Offset) {
- static const char *Strings[] = { "Not Permitted", "IEEE-754" };
+ static const char *const Strings[] = { "Not Permitted", "IEEE-754" };
uint64_t Value = ParseInteger(Data, Offset);
StringRef ValueDesc =
@@ -312,7 +318,7 @@ void ARMAttributeParser::ABI_FP_user_exc
void ARMAttributeParser::ABI_FP_number_model(AttrType Tag, const uint8_t *Data,
uint32_t &Offset) {
- static const char *Strings[] = {
+ static const char *const Strings[] = {
"Not Permitted", "Finite Only", "RTABI", "IEEE-754"
};
@@ -324,7 +330,7 @@ void ARMAttributeParser::ABI_FP_number_m
void ARMAttributeParser::ABI_align_needed(AttrType Tag, const uint8_t *Data,
uint32_t &Offset) {
- static const char *Strings[] = {
+ static const char *const Strings[] = {
"Not Permitted", "8-byte alignment", "4-byte alignment", "Reserved"
};
@@ -344,7 +350,7 @@ void ARMAttributeParser::ABI_align_neede
void ARMAttributeParser::ABI_align_preserved(AttrType Tag, const uint8_t *Data,
uint32_t &Offset) {
- static const char *Strings[] = {
+ static const char *const Strings[] = {
"Not Required", "8-byte data alignment", "8-byte data and code alignment",
"Reserved"
};
@@ -365,7 +371,7 @@ void ARMAttributeParser::ABI_align_prese
void ARMAttributeParser::ABI_enum_size(AttrType Tag, const uint8_t *Data,
uint32_t &Offset) {
- static const char *Strings[] = {
+ static const char *const Strings[] = {
"Not Permitted", "Packed", "Int32", "External Int32"
};
@@ -377,7 +383,7 @@ void ARMAttributeParser::ABI_enum_size(A
void ARMAttributeParser::ABI_HardFP_use(AttrType Tag, const uint8_t *Data,
uint32_t &Offset) {
- static const char *Strings[] = {
+ static const char *const Strings[] = {
"Tag_FP_arch", "Single-Precision", "Reserved", "Tag_FP_arch (deprecated)"
};
@@ -389,7 +395,7 @@ void ARMAttributeParser::ABI_HardFP_use(
void ARMAttributeParser::ABI_VFP_args(AttrType Tag, const uint8_t *Data,
uint32_t &Offset) {
- static const char *Strings[] = {
+ static const char *const Strings[] = {
"AAPCS", "AAPCS VFP", "Custom", "Not Permitted"
};
@@ -401,7 +407,7 @@ void ARMAttributeParser::ABI_VFP_args(At
void ARMAttributeParser::ABI_WMMX_args(AttrType Tag, const uint8_t *Data,
uint32_t &Offset) {
- static const char *Strings[] = { "AAPCS", "iWMMX", "Custom" };
+ static const char *const Strings[] = { "AAPCS", "iWMMX", "Custom" };
uint64_t Value = ParseInteger(Data, Offset);
StringRef ValueDesc =
@@ -412,7 +418,7 @@ void ARMAttributeParser::ABI_WMMX_args(A
void ARMAttributeParser::ABI_optimization_goals(AttrType Tag,
const uint8_t *Data,
uint32_t &Offset) {
- static const char *Strings[] = {
+ static const char *const Strings[] = {
"None", "Speed", "Aggressive Speed", "Size", "Aggressive Size", "Debugging",
"Best Debugging"
};
@@ -426,7 +432,7 @@ void ARMAttributeParser::ABI_optimizatio
void ARMAttributeParser::ABI_FP_optimization_goals(AttrType Tag,
const uint8_t *Data,
uint32_t &Offset) {
- static const char *Strings[] = {
+ static const char *const Strings[] = {
"None", "Speed", "Aggressive Speed", "Size", "Aggressive Size", "Accuracy",
"Best Accuracy"
};
@@ -461,7 +467,7 @@ void ARMAttributeParser::compatibility(A
void ARMAttributeParser::CPU_unaligned_access(AttrType Tag, const uint8_t *Data,
uint32_t &Offset) {
- static const char *Strings[] = { "Not Permitted", "v6-style" };
+ static const char *const Strings[] = { "Not Permitted", "v6-style" };
uint64_t Value = ParseInteger(Data, Offset);
StringRef ValueDesc =
@@ -471,7 +477,7 @@ void ARMAttributeParser::CPU_unaligned_a
void ARMAttributeParser::FP_HP_extension(AttrType Tag, const uint8_t *Data,
uint32_t &Offset) {
- static const char *Strings[] = { "If Available", "Permitted" };
+ static const char *const Strings[] = { "If Available", "Permitted" };
uint64_t Value = ParseInteger(Data, Offset);
StringRef ValueDesc =
@@ -481,7 +487,7 @@ void ARMAttributeParser::FP_HP_extension
void ARMAttributeParser::ABI_FP_16bit_format(AttrType Tag, const uint8_t *Data,
uint32_t &Offset) {
- static const char *Strings[] = { "Not Permitted", "IEEE-754", "VFPv3" };
+ static const char *const Strings[] = { "Not Permitted", "IEEE-754", "VFPv3" };
uint64_t Value = ParseInteger(Data, Offset);
StringRef ValueDesc =
@@ -491,7 +497,7 @@ void ARMAttributeParser::ABI_FP_16bit_fo
void ARMAttributeParser::MPextension_use(AttrType Tag, const uint8_t *Data,
uint32_t &Offset) {
- static const char *Strings[] = { "Not Permitted", "Permitted" };
+ static const char *const Strings[] = { "Not Permitted", "Permitted" };
uint64_t Value = ParseInteger(Data, Offset);
StringRef ValueDesc =
@@ -501,7 +507,7 @@ void ARMAttributeParser::MPextension_use
void ARMAttributeParser::DIV_use(AttrType Tag, const uint8_t *Data,
uint32_t &Offset) {
- static const char *Strings[] = {
+ static const char *const Strings[] = {
"If Available", "Not Permitted", "Permitted"
};
@@ -513,7 +519,7 @@ void ARMAttributeParser::DIV_use(AttrTyp
void ARMAttributeParser::T2EE_use(AttrType Tag, const uint8_t *Data,
uint32_t &Offset) {
- static const char *Strings[] = { "Not Permitted", "Permitted" };
+ static const char *const Strings[] = { "Not Permitted", "Permitted" };
uint64_t Value = ParseInteger(Data, Offset);
StringRef ValueDesc =
@@ -523,7 +529,7 @@ void ARMAttributeParser::T2EE_use(AttrTy
void ARMAttributeParser::Virtualization_use(AttrType Tag, const uint8_t *Data,
uint32_t &Offset) {
- static const char *Strings[] = {
+ static const char *const Strings[] = {
"Not Permitted", "TrustZone", "Virtualization Extensions",
"TrustZone + Virtualization Extensions"
};
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