[PATCH] D12452: AMDGPU/SI: Add support for llvm.r600.local.size.* instrics when targeting HSA

[Matt Arsenault via llvm-commits]

arsenm added a comment.

LGTM


================
Comment at: lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp:511
@@ -510,2 +510,3 @@
   header.code_properties =
+      AMD_CODE_PROPERTY_ENABLE_SGPR_DISPATCH_PTR |
       AMD_CODE_PROPERTY_ENABLE_SGPR_KERNARG_SEGMENT_PTR |
----------------
We should be able to detect if this will be needed from the IR, but I'm not sure where to put that

================
Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:606-609
@@ +605,6 @@
+          TRI->getPreloadedValue(MF, SIRegisterInfo::DISPATCH_PTR);
+      unsigned DispatchPtrRegLo =
+          TRI->getPhysRegSubReg(DispatchPtrReg, &AMDGPU::SReg_32RegClass, 0);
+      unsigned DispatchPtrRegHi =
+          TRI->getPhysRegSubReg(DispatchPtrReg, &AMDGPU::SReg_32RegClass, 1);
+      CCInfo.AllocateReg(DispatchPtrRegLo);
----------------
I'm not sure why we have getPhysRegSubReg when getSubReg already exists. I'm already working on fixing this in other patches though


http://reviews.llvm.org/D12452