[PATCH] D13511: [mips] Use correct frame register for DWARF info when dynamically realigning the stack.

[Daniel Sanders via llvm-commits]

dsanders added a comment.

> > > In general, the assembly looks somewhat optimised. This makes a bit harder to debug the code. Is there something that can be mitigated to obtain a more direct and contiguous correspondence between the original source and the assembly?

>  > I can't think of anything other than trying to use lower optimization levels.

>  ouch, I'm already invoking llc with -O0. Does this depend on the front-end?


I'm aware that SelectionDAG will fold identical nodes together, effectively doing CSE.

You could try '-mllvm -pre-RA-sched=source' which tries to respect source order when linearizing the SelectionDAG nodes.


================
Comment at: lib/Target/Mips/MipsSEFrameLowering.cpp:588-593
@@ +587,8 @@
+
+  // Find out the correct register.
+  FrameReg = ABI.GetStackPtr();
+  if (hasBP(MF))
+    FrameReg = ABI.GetBasePtr();
+  else if (MRI->needsStackRealignment(MF))
+    FrameReg = ABI.GetStackPtr();
+
----------------
I'm surprised that the frame pointer isn't a possible choice here. Shouldn't MipsRegisterInfo::getFrameRegister() be called somewhere?

================
Comment at: lib/Target/Mips/MipsSEFrameLowering.cpp:596
@@ +595,3 @@
+  return MFI->getObjectOffset(FI) + MFI->getStackSize() -
+    getOffsetOfLocalArea() + MFI->getOffsetAdjustment();
+}
----------------
Indentation? I'm not sure on this one but I'd expect clang-format to align to the MFI.

================
Comment at: test/CodeGen/Mips/dynamic-stack-realignment-dwarf.ll:1
@@ +1,2 @@
+; RUN: llc -filetype=obj -march=mips -mcpu=mips32r2 < %s | \
+; RUN:    llvm-dwarfdump -debug-dump=info - | FileCheck %s
----------------
(filename): This test should be in test/DebugInfo/Mips


http://reviews.llvm.org/D13511