[PATCH] D13722: Scalarization for masked gather/scatter intrinsics

[Elena Demikhovsky via llvm-commits]

delena created this revision.
delena added reviewers: qcolombet, hfinkel, mzolotukhin.
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delena set the repository for this revision to rL LLVM.

Masked gather/scatter intrinsics are supported on AVX-512 targets and only for 32/64 bit integers and FP types.
In all other cases these intrinsics should be split in a chain of basic blocks and a sequence of scalar load/store operations.

Example:
<16 x i32 > @llvm.masked.gather.v16i32( <16 x i32*> %Ptrs, i32 4, <16 x i1> %Mask, <16 x i32> %Src)
is translated to:

%Mask0 = extractelement <16 x i1> %Mask, i32 0
% ToLoad0 = icmp eq i1 % Mask0, true
 br i1 % ToLoad0, label %cond.load, label %else

cond.load:
% Ptr0 = extractelement <16 x i32*> %Ptrs, i32 0
% Load0 = load i32, i32* % Ptr0, align 4
% Res0 = insertelement <16 x i32> undef, i32 % Load0, i32 0
 br label %else
 
 else:
 %res.phi.else = phi <16 x i32>[% Res0, %cond.load], [undef, % 0]
 % Mask1 = extractelement <16 x i1> %Mask, i32 1
 % ToLoad1 = icmp eq i1 % Mask1, true
...

Repository:
  rL LLVM

http://reviews.llvm.org/D13722

Files:
  ../include/llvm/Analysis/TargetTransformInfo.h
  ../include/llvm/Analysis/TargetTransformInfoImpl.h
  ../lib/Analysis/TargetTransformInfo.cpp
  ../lib/CodeGen/CodeGenPrepare.cpp
  ../lib/Target/X86/X86TargetTransformInfo.cpp
  ../lib/Target/X86/X86TargetTransformInfo.h
  ../test/CodeGen/X86/masked_gather_scatter.ll

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