[PATCH] D13648: AVX512: shuff62x2 DAG lowering

[Igor Breger via llvm-commits]

igorb added inline comments.

================
Comment at: lib/Target/X86/Utils/X86ShuffleDecode.h:91
@@ -88,1 +90,3 @@
+void DecodeVSHUF128Mask(MVT VT, unsigned Imm,
+                          SmallVectorImpl<int> &ShuffleMask);
 
----------------
RKSimon wrote:
> Shouldn't this be called DecodeVSHUF64x2Mask?
This  function decode mask for SHUFF32x4/SHUFF64x2/SHUFI32x4/SHUFI64x2 instructions.

================
Comment at: lib/Target/X86/X86ISelLowering.cpp:10727
@@ +10726,3 @@
+  if (!canWidenShuffleElements(Mask, WidenedMask))
+    return SDValue();
+
----------------
RKSimon wrote:
> Is this actually necessary? I'd expect it to have been dealt with by canonicalization in lowerVectorShuffle.
I can't do canonicalization for 256bit vector,  lowerV2X128VectorShuffle can't be moved to lowerVectorShuffle, a lot of test failed.

================
Comment at: test/CodeGen/X86/vector-shuffle-512-v8.ll:1237
@@ +1236,3 @@
+; ALL-NEXT:    vpmovsxwq %xmm1, %zmm1
+; ALL-NEXT:    vpandq {{.*}}(%rip){1to8}, %zmm1, %zmm1
+; ALL-NEXT:    vptestmq %zmm1, %zmm1, %k1
----------------
RKSimon wrote:
> Nothing to do with this patch but its a shame that this is ANDing with a 512-bit constant mask instead of pre-ANDing with a 128-bit constant mask and then calling vpmovzxwq.
This is AND with a 512-bit vector broadcasted from a 64-bit memory location.
          vpandq	LCPI0_0(%rip){1to8}, %zmm1, %zmm1


Repository:
  rL LLVM

http://reviews.llvm.org/D13648