[PATCH] D13672: [ARM CodeGen] @llvm.debugtrap call may be removed when restoring callee saved registers

[Oleg Ranevskyy via llvm-commits]

iid_iunknown created this revision.
iid_iunknown added reviewers: asl, rengolin.
iid_iunknown added a subscriber: llvm-commits.
iid_iunknown set the repository for this revision to rL LLVM.
Herald added subscribers: dschuff, rengolin, jfb, aemerson.

When ARMFrameLowering::emitPopInst generates a "pop" instruction to restore the callee saved registers, it checks if the LR register is among them. If so, the function may decide to remove the basic block's terminator and replace it with a "pop" to the PC register instead of LR.

This leads to a problem when the block's terminator is preceded by a "llvm.debugtrap" call. The MI iterator points to the trap in such a case, which is also a terminator. If the function decides to restore LR to PC, it erroneously removes the trap.

Repository:
  rL LLVM

http://reviews.llvm.org/D13672

Files:
  lib/Target/ARM/ARMFrameLowering.cpp
  test/CodeGen/ARM/debugtrap.ll

Index: test/CodeGen/ARM/debugtrap.ll
===================================================================
--- test/CodeGen/ARM/debugtrap.ll
+++ test/CodeGen/ARM/debugtrap.ll
@@ -0,0 +1,18 @@
+; This test ensures the @llvm.debugtrap() call is not removed when generating
+; the 'pop' instruction to restore the callee saved registers on ARM.
+
+; RUN: llc -mtriple=armv7 -filetype=obj -O0 %s -o - \
+; RUN:  | llvm-objdump -disassemble -triple armv7 - \
+; RUN:  | FileCheck %s 
+
+declare void @llvm.debugtrap() nounwind
+declare void @foo() nounwind
+
+define void @test() nounwind {
+entry:
+  ; CHECK: bl
+  ; CHECK: fe de ff e7 trap
+  call void @foo()
+  call void @llvm.debugtrap()
+  ret void
+}
Index: lib/Target/ARM/ARMFrameLowering.cpp
===================================================================
--- lib/Target/ARM/ARMFrameLowering.cpp
+++ lib/Target/ARM/ARMFrameLowering.cpp
@@ -968,12 +968,16 @@
   DebugLoc DL;
   bool isTailCall = false;
   bool isInterrupt = false;
+  bool isTrap = false;
   if (MBB.end() != MI) {
     DL = MI->getDebugLoc();
     unsigned RetOpcode = MI->getOpcode();
     isTailCall = (RetOpcode == ARM::TCRETURNdi || RetOpcode == ARM::TCRETURNri);
     isInterrupt =
         RetOpcode == ARM::SUBS_PC_LR || RetOpcode == ARM::t2SUBS_PC_LR;
+    isTrap =
+        RetOpcode == ARM::TRAP || RetOpcode == ARM::TRAPNaCl ||
+        RetOpcode == ARM::tTRAP;
   }
 
   SmallVector<unsigned, 4> Regs;
@@ -990,7 +994,7 @@
         continue;
 
       if (Reg == ARM::LR && !isTailCall && !isVarArg && !isInterrupt &&
-          STI.hasV5TOps()) {
+          !isTrap && STI.hasV5TOps()) {
         if (MBB.succ_empty()) {
           Reg = ARM::PC;
           DeleteRet = true;


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